Abstract
This chapter discusses some alternate gate dielectrics apart from the conventional SiO2. Their various properties, fabrication techniques, and their impact on the MOSFET performance have been discussed. A review of low-κ dielectrics for interconnect application at the nanometer scale has also been given.
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The text/figures/equations/references etc associated with [98] have been republished/reorganized from the paper [98], Amit Chaudhry and Jatindra Nath Roy, “A Quantum Mechanical Model of Gate Oxide Direct Current Density in high-k dielectrics for Nanoscale MOS applications”, Elektrica-Journal of Electrical Engineering, Vol. 13, No. 1, pp.1–6, 2011 with due permission from the publisher.
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Chaudhry, A. (2013). Dielectrics for Nanoelectronics. In: Fundamentals of Nanoscaled Field Effect Transistors. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-6822-6_4
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DOI: https://doi.org/10.1007/978-1-4614-6822-6_4
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