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Unifying Electrical Engineering and Electronics Engineering pp 2229–2242Cite as

SSE Instruction and Block Predetermination-Based Automaton Optimization

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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 238))

Abstract

Techniques to decrease the memory requirements of large patterns set for an intrusion detection system (IDS), block predetermination, and block matching based on a self-balancing binary search tree (AVL) are defined in this chapter. By introducing SSE instruction, the new DFA matching system can increase matching efficiency when compared to the standard AC implementation. For illustration, a number of tests, according to different lengths or different amount of patterns were used to show how many DFA states and how much memory can be saved by the design. Empirical results show that at best an SSE-AVL-based implementation of DFA can save about 98 % of memory usage in common DFA when using randomly generated patterns. The hybrid of block DFA and common character DFA can effectively suppress memory requirements, and with the help of block predetermination with two-level-AVL filtration and SSE instruction, the matching speed performs better than standard AC under single process case.

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Notes

  1. 1.

    Block string: string with length 16.

  2. 2.

    Non-zero jump: In AC automaton matching, when the automaton reads a legal character, the destination state is an integer number larger than 0. in this chapter we name this kind of destination jump as non-zero jump.

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Acknowledgments

This work is partially supported by the National Grand Fundamental Research 973 Program of China (Grant No. 2011CB302605); the National Natural Science Foundation of China (Grant No. 61173145); High-Tech Research and Development Plan of China (Grant No. 2010AA012504, 2011AA010705). I really appreciate K.A. Poulin’s and Louis Petker’s help for the 2 days’ work correcting this chapter. I hope they can recover from illness. The authors also gratefully acknowledge the helpful comments and suggestions of the reviewers, which have improved the presentation.

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Authors and Affiliations

  1. Computer Science and Technology College, Computer Network and Information Security Technology Research Center, Harbin Institute of Technology, Harbin, Heilongjiang, 150001, China

    Tianlong Yang, Hongli Zhang, Xiaolong Cao, Zhihong Tian & Mahmoud T. Qassrawi

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  1. Tianlong Yang
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  2. Hongli Zhang
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  3. Xiaolong Cao
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  4. Zhihong Tian
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  5. Mahmoud T. Qassrawi
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Corresponding author

Correspondence to Tianlong Yang .

Editor information

Editors and Affiliations

  1. Dept. Information Systems, California State University, Los Angeles College of Business & Economics, Los Angeles, California, USA

    Song Xing

  2. Electronics and Information Technology S, Nanjing University of Information and Sc, Nanjing, Jiangsu, China, People's Republic

    Suting Chen

  3. Sunnyvale, California, USA

    Zhanming Wei

  4. Electronics and Information Technology S, Nanjing University of Information and Sc, Nanjing, Jiangsu, China, People's Republic

    Jingming Xia

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Yang, T., Zhang, H., Cao, X., Tian, Z., Qassrawi, M.T. (2014). SSE Instruction and Block Predetermination-Based Automaton Optimization. In: Xing, S., Chen, S., Wei, Z., Xia, J. (eds) Unifying Electrical Engineering and Electronics Engineering. Lecture Notes in Electrical Engineering, vol 238. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-4981-2_244

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  • DOI: https://doi.org/10.1007/978-1-4614-4981-2_244

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  • Print ISBN: 978-1-4614-4980-5

  • Online ISBN: 978-1-4614-4981-2

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