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\(4 \times 12\) Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Receiver in 65 nm CMOS Process

Chapter
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

The demand for higher throughput combined with the finite number of I/Os has increased the need for higher data rates per pin [1-6]. Unfortunately, this usually results in increased inter-symbol interference and crosstalk noise, demanding larger power consumption for signal amplification and equalization. Conventionally, crosstalk has been handled by board-level techniques i.e. maintaining sufficient distance between channels or shielding signal channels. Choosing differential I/Os instead of single-ended can reduce crosstalk but at the cost of doubling the number of I/O pads and increases power consumption.

Keywords

Channel Spacing Arbitrary Waveform Generator Crosstalk Signal Forward Signal Crosstalk Noise 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgments

This research was supported in part by the Semiconductor Research Corporation under grant #2008-HC-1836-090768 at the University of Minnesota.

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Copyright information

© Springer Science+Business Media New York 2014

Authors and Affiliations

  1. 1.Department of Electronic Engineering Kwangwoon UniversitySeoulSouth Korea
  2. 2.Department of Electronic EngineeringUniversity of MinnesotaMinneapolisUSA

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