The Spidergon STNoC

  • Konstantinos Tatas
  • Kostas Siozios
  • Dimitrios Soudris
  • Axel Jantsch
Chapter

Abstract

Spidergon STNoC is a state-of-the-art, low-cost on-chip interconnect that plays a vital role in enabling multiprocessor system-on-chip by providing structure, performance, and modularity. This chapter outlines topological and routing characteristics of the packet-switched Spidergon STNoC, focusing on its low diameter, vertex-symmetric, point-to-point chordal ring topology, and its low-cost, efficient deterministic, shortest-path routing algorithm. It also describes interesting design tools and discusses new Spidergon extensions toward fault tolerant routing.

Keywords

Coherence Sorting Prefix Topaz 

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Copyright information

© Springer Science+Business Media New York 2014

Authors and Affiliations

  • Konstantinos Tatas
    • 1
  • Kostas Siozios
    • 2
  • Dimitrios Soudris
    • 2
  • Axel Jantsch
    • 3
  1. 1.Department of Computer Science and Engineering, School of Applied SciencesFrederick UniversityNicosiaCyprus
  2. 2.Department of Computer Science, School of Electrical and Computer EngineeringNational Technical University of AthensAthensGreece
  3. 3.Department of Electronic SystemsRoyal Institute of TechnologyKistaSweden

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