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CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications pp 99–146Cite as

Post-Amplifier

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Part of the book series: Analog Circuits and Signal Processing ((ACSP))

Abstract

In this chapter, theoretical fundamentals regarding the amplifier core, such as multistage design and broadband techniques, and auxiliary loops, such as constant settling time for AGC and offset compensation, are presented. The proposed AGC amplifier is implemented in a low-cost CMOS technology, and its design is explained step-by-step. Finally, the verification of such a circuit is included.

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Authors and Affiliations

  1. Faculty of Sciences, University of Zaragoza, Pedro Cerbuna 12, 50009, Zaragoza, Spain

    Francisco Aznar, Santiago Celma & Belén Calvo

Authors
  1. Francisco Aznar
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  2. Santiago Celma
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  3. Belén Calvo
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Corresponding author

Correspondence to Francisco Aznar .

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Aznar, F., Celma, S., Calvo, B. (2013). Post-Amplifier. In: CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-3464-1_4

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  • DOI: https://doi.org/10.1007/978-1-4614-3464-1_4

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4614-3463-4

  • Online ISBN: 978-1-4614-3464-1

  • eBook Packages: EngineeringEngineering (R0)

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