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Execution Efficiency of the Microthreaded Pipeline

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UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs

Abstract

When analyzing execution efficiency of the microthreaded pipeline, we are interested in two key things:

  1. 1.

    The number of stall clock cycles in the processing pipeline.

  2. 2.

    The latency tolerance for blocking and non-blocking long-latency operations.

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Daněk, M., Kafka, L., Kohout, L., Sýkora, J., Bartosiński, R. (2013). Execution Efficiency of the Microthreaded Pipeline. In: UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-2410-9_7

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  • DOI: https://doi.org/10.1007/978-1-4614-2410-9_7

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