Abstract
This chapter introduces the technical challenges associated with increasing variations as a result from scaling down the dimensions of devices fabricated with complementary metal-oxide-semiconductor (CMOS) technology. The incentives for further improvements of variation-aware design and testing techniques are also highlighted. Finally, the chapter contains an overview of the scope and organization of this book.
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References
International Technology Roadmap for Semiconductors, Test and Test Equipment, 2009 edn. Available: http://public.itrs.net/reports.html
S. Menon, C.L. Horney, Smartphone & Chip Market Opportunities, Market research report no. 9010, Forward Concepts Co., Available: http://fwdconcepts.com/Smartphones. 5 Feb 2009
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© 2012 Springer Science+Business Media New York
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Onabajo, M., Silva-Martinez, J. (2012). Introduction. In: Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip. Springer, Boston, MA. https://doi.org/10.1007/978-1-4614-2296-9_1
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DOI: https://doi.org/10.1007/978-1-4614-2296-9_1
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Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4614-2295-2
Online ISBN: 978-1-4614-2296-9
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