Hardware Redundancy



Hardware redundancy is achieved by providing two or more physical copies of a hardware component. When other techniques, such as use of more reliable components, manufacturing quality control, test, design simplification, etc., have been exhausted, hardware redundancy may be the only way to improve the dependability of a system. However, hardware redundancy brings a number of penalties: increase in weight, size, power consumption, cost, as well as time to design, fabricate, and test. Therefore, a number of choices have to be examined to determine the best way to incorporate redundancy into a system. In this chapter, we present common hardware redundancy configurations and evaluate their effect on system dependability.


Module Fault Repair Rate Standby Mode Triple Modular Redundancy Redundant Component 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    Beiu, V., Quintana, J.M., Avedillo, M.J.: VLSI implementations of threshold logic—a comprehensive survey. IEEE Trans. Neural Netw. 14(5), 1217–1243 (2003)CrossRefGoogle Scholar
  2. 2.
    Bilstein, R.E.: Stages to Saturn: A Technological History of the Apollo/Saturn Launch Vehicle. DIANE Publishing, Darby (1999)Google Scholar
  3. 3.
    COMPAQ: HP/COMPAQ non-stop Himalaya products (2005).
  4. 4.
    Dickinson, M., Jackson, J., Randa, G.: Saturn V launch vehicle digital computer and data adapter. In: Proceedings of the Fall Joint Computer Conference, pp. 501–516 (1964)Google Scholar
  5. 5.
    Ferrara, L.A.: Summary description of the AAP Apollo telescope mount. Technical Report TM-68-1022-3, National Aeronautics and Space Administration (NASA) (1968)Google Scholar
  6. 6.
    Johnson, B.W.: The Design and Analysis of Fault Tolerant Digital Systems. Addison-Wesley, Reading (1989)Google Scholar
  7. 7.
    Losq, J.: Influence of fault-detection and switching mechanisms on the reliability of stand-by systems. In: Digest 5th International Symposium on Fault-Tolerant Computing, pp. 81–86 (1975)Google Scholar
  8. 8.
    Losq, J.: A highly efficient redundancy scheme: Self-purging redundancy. IEEE Trans. Comput. 25(6), 569–578 (1976)MATHCrossRefGoogle Scholar
  9. 9.
    McAllister, D., Vouk, M.A.: Fault-tolerant software reliability engineering. In: Lyu, M.R. (ed.) Handbook of Software Reliability, pp. 567–614. McGraw-Hill, New York (1996)Google Scholar
  10. 10.
    Moore, E., Shannon, C.: Reliable circuits using less reliable relays. J. Frankl. Inst. 262(3), 191–208 (1956)MathSciNetCrossRefGoogle Scholar
  11. 11.
    Parhami, B.: Voting algorithms. IEEE Trans. Reliab. 43, 617–629 (1994)CrossRefGoogle Scholar
  12. 12.
    Pratt, B., Caffrey, M., Graham, P., Morgan, K., Wirthlin, M.: Improving FPGA design robustness with partial TMR. In: Proceedings of 44th Reliability Physics Symposium, pp. 226–232 (2006)Google Scholar
  13. 13.
    Siewiorek, D.P., McCluskey, E.J.: An iterative cell switch design for hybrid redundancy. IEEE Trans. Comput. 22(3), 290–297 (1973)CrossRefGoogle Scholar
  14. 14.
    Siewiorek, D.P., Swarz, R.S.: Reliable Computer Systems: Design and Evaluation, 3rd edn. A K Peters Ltd, Wellesley (1998)Google Scholar
  15. 15.
    Smith, D.J.: Reliability Engineering. Barnes & Noble Books, New York (1972)Google Scholar
  16. 16.
    von Neumann, J.: Probabilistic logics and synthesis of reliable organisms from unreliable components. In: Shannon, C., McCarthy, J.: (eds.) Automata Studies, pp. 43–98. Princeton University Press, Princeton (1956)Google Scholar
  17. 17.
    Yeh, Y.: Triple-triple redundant 777 primary flight computer. In: Aerospace Applications Conference, Proceedings, 1996 IEEE, vol. 1, pp. 293–307 (1996)Google Scholar

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  1. 1.KTH Royal Institute of TechnologyKristaSweden

Personalised recommendations