Bottom-up Verification for CMOS Photonic Linear Heterogeneous System

Abstract

The CMOS photonic circuit is typically a heterogeneous system, which contains both electronic and optical devices. To design and verify such kind of circuit, the conventional method is to design and simulate them separately, i.e., the electronic circuits in EDA tools and optical circuits in optical mode solver and FDTD (Finite-difference time-domain) simulator, and then to combine the two parts together. This process is tedious because the brute-force simulation for both electronic circuits and optical circuits could be very time consuming. Moreover, even if these individual simulations are done, the simulation of interface between electronic and optical circuits could be problematical because the signals at the interface for the two parts are not in the same physical discipline. So it will be necessary to create a common electrical/optical simulation environment, in which the designers are able to build the CMOS photonic heterogeneous system from both electronic and optical libraries. In this chapter, we will present a simulation methodology which allows to create a simulation environment for CMOS photonic heterogeneous system. Using hardware description language, we create behavioral models for optical devices with S-matrix formalism. The challenges in model implementation have been addressed, such as large-size vector representation at model ports and complex matrix calculation. And a Verilog-AMS + VPI simulation strategy is proposed to solve the simulation issues. Finally, the proposed method is applied to bottom-up verification of a micro-ring array, and the simulation result matches well with brute force simulation, while the simulation time is largely reduced.