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Partial Reconfiguration on FPGAs pp 199–233Cite as

Self-adaptive Reconfigurable Networks

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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 153))

Abstract

Connecting several control units via a network is becoming important for a rising number of complex embedded systems. In such systems, each control unit is specialized to execute certain functionality. With the introduction of reconfigurable hardware (commonly FPGAs) as a centric part of the control units, a new dimension of flexibility can be implemented with the help of runtime reconfiguration. On a node level, this includes reconfiguring hardware and software tasks on a single control unit, called ReCoNode in the following, while the reconfiguration may also involve a network level where tasks are migrated among different ReCoNodes of a so-called ReCoNet. An example of a ReCoNet is depicted in Fig. 4.1a. The capability of reconfiguring a ReCoNode or a ReCoNet allows the system to automatically adapt to environmental changes, including faults, network topology changes, or varying workload scenarios, as illustrated by the different examples in Fig. 4.1a–e.

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Notes

  1. 1.

    There might exist situations where a register snapshot, taken at a certain clock cycle, is not representing a consistent state. For example, if the snapshot is taken during the evaluation of a multy cycle path.

  2. 2.

    In general, depending on the checkpoint protocol, multiple checkpoints can exist,including the state at the input and output. For clearness, only one checkpoint is assumed throughout this chapter.

  3. 3.

    Refer to [JW05] for a comprehensive overview on hardware/software interface techniques.

  4. 4.

    This can be achieved by preventing possible optimizations. For example, synthesis tools typically provide keep pragmas for maintaining specific signals even if optimizations could remove these signals (e.g., the signals tmp 1 and tmp 2 in the Boolean example function).

  5. 5.

    The size of the used integer number depends on language and compiler version. For example, Visual C +  + 4.2 equates bool with an 32-bit integer inside the standard C +  + header files that contain the type definition, while all later versions implement Boolean variables with a size of 1 byte.

  6. 6.

    Note that in the VHDL language, the state encoding of enumerated tapes is the only specified synthesizable attribute in this language [Ash08].

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Koch, D. (2013). Self-adaptive Reconfigurable Networks. In: Partial Reconfiguration on FPGAs. Lecture Notes in Electrical Engineering, vol 153. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-1225-0_4

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