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Compact Models and Measurement Techniques for High-Speed Interconnects pp 1–13Cite as

Introduction

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Abstract

During the early evolutionary years of Integrated Circuit (IC) design, most of the research emphasized the need for performance improvement of transistors and other computing blocks. Transistor performance was seen as one on the most important design bottlenecks in those times. In 1965, Gordon E. Moore came up with a series of visionary predictions. Till date these predictions are valid to a large extent and the semiconductor industry is predominantly driven by these predictions. In a nutshell, Moore suggested that the performance and design complexity of ICs would grow exponentially and double every 18–24 months. During the same period, cost of transistors would reduce roughly by the same proportion each time we hit the Moore’s next prediction. Interestingly, while Gordon Moore thought it was only some observations, history of semiconductor growth only suggests that the notion of it being a law indeed holds good.

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Authors and Affiliations

  1. Interconnect Focus Center, Georgia Institute of Technology, Atlanta, GA, USA

    Rohit Sharma

  2. Tata Consultancy Services, Kolkata, India

    Tapas Chakravarty

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  1. Rohit Sharma
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Sharma, R., Chakravarty, T. (2012). Introduction. In: Compact Models and Measurement Techniques for High-Speed Interconnects. SpringerBriefs in Electrical and Computer Engineering(). Springer, Boston, MA. https://doi.org/10.1007/978-1-4614-1071-3_1

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  • DOI: https://doi.org/10.1007/978-1-4614-1071-3_1

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  • Print ISBN: 978-1-4614-1070-6

  • Online ISBN: 978-1-4614-1071-3

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