Abstract
The operation of a semiconductor device is sensitive to junction temperature (Integrated circuits thermal test method environment conditions-natural convection (still air), 1995). When the junction temperature exceeds the functional limit, the device does not operate in a normal way. It is also well known that the failure rates of semiconductor devices increase exponentially as the junction temperature rises. It is very crucial that the package designer and set application engineer understand the definition, characteristics, and application of the thermal resistance of the electronic packaging for proper device operation. Power dissipation during the operation of the semiconductor device induces an increase in the junction temperature. This depends on the amount of power dissipation and the thermal resistance between the junction and the package surface (referred to as “case” hereafter), an ambient and some other specified reference point. This chapter introduces the thermal management, design, and cooling methods for power electronic packaging.
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Liu, Y. (2012). Thermal Management, Design, and Cooling for Power Electronics. In: Power Electronic Packaging. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-1053-9_6
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DOI: https://doi.org/10.1007/978-1-4614-1053-9_6
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