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Analog-to-Digital Converters

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VLSI for Wireless Communication
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Abstract

Traditionally in a receiver (as shown in Figure 2.1), upon mixing the input signal from RF to IF, subsequent demodulation can be performed in a couple of ways, depending on the kind of modulation used. In the case of DECT, since the input signal is phase modulated (GMSK for DE4CT), MSK demodulation for the digital encoded phase information should be performed. This can be done in a manner akin to demodulating a QPSK signal. There are three common ways to demodulate a QPSK signal: FM discriminator, IF detection, and baseband detection [9]. Each of these methods can be done entirely in the analog domain or by doing first an analog to digital (A/D) conversion at IF and then implementing these methods digitally using digital signal processing (DSP). In this sense the A/D converter becomes part of the demodulator. Using an A/D converter in a demodulator obviously is beneficial in terms of being able to integrate the post A/D conversion signal processing function on chip easily.

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References

  1. Y. Manoii, “Reconfigurable ADCs for 3.xG and 4G,” ISSCC 2009 Forum F3.

    Google Scholar 

  2. K. C. H. Chao, S. Nadeem, W. L. Lee, and C. G. Sodini, “A Higher Order Topology for Interpolative Modulators for Oversampled A/D Conversion,” IEEE Trans. Circuits Sys., vol. CAS-, pp. 309–318, March. 1990.

    Article  Google Scholar 

  3. W. Chou, P. W. Wong, and R. M. Gray, “Multistage Sigma-Delta Modulation,” IEEE Trans. Inform. Theory, vol. IT-35, pp. 784–796, July 1989.

    Article  MathSciNet  Google Scholar 

  4. S. Au and B. Leung, “A 1.95-V, 0.34-mV, 12-b Sigma-Delta Modulator Stabilized by Local Feedback Loops,” IEEE Journal of Solid-State Circuits, vol. JSSC-32, pp. 321−328, March 1997.

    Article  Google Scholar 

  5. F. Chen and B. Leung, “A 0.25 mW Low Pass Passive Sigma-Delta Modulator with Built-In Mixer for a 10-MHz IF Input,” IEEE Journal of Solid-State Circuits, vol. JSSC-33, pp. 774−782, June 1997.

    Article  Google Scholar 

  6. Ong and B. Wooley, “A 2-Path Band Pass Sigma-Delta Modulator for Digital IF extraction at 20 MHz,” IEEE Journal of Solid-State Circuits, vol. 32, pp. 1920–1934, December 1997.

    Google Scholar 

  7. Namdar, B. Leung, "A 400 MHz 12-Bit 18 mW IF Digitizer with Mixer Inside a Sigma-Delta Modulator Loop," IEEE Journal of Solid State Circuits, Vol. 34, pp. 1765–1777, December 1999.

    Article  Google Scholar 

  8. Y. Ren, B. Leung, and Y.M. Len, "A Mistmatch Independent DNL Pipelined Analog to Digital Convernter,” IEEE Transactions on Circuits and System II, Analog and Digital Signal Processing, vol. 46, no. 6, pp. 699–704, June 1999.

    Article  Google Scholar 

  9. T. S. Rappaport, Wireless communications : principles and practice, Prentice Hall, 1996, problem 5.23.

    Google Scholar 

  10. Leung, "Oversampled A/D Converter," Chapter 10 (pp. 467–505), Analog VLSI; Signal and Information Processing,. M. Ismail and T. Fiez, McGraw-Hill, 1993.

    Google Scholar 

  11. Roubik Gregorian, and Gabor C. Temes, Analog MOS Integrated Circuits for Signal Processing, Wiley, 1986.

    Google Scholar 

  12. S. Sen and B. Leung, "A 150 MHz 13b 12.5 mW IF digitizer,” Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998, pp. 233–236.

    Google Scholar 

  13. James C. Candy and Gabor C. Temes, Oversampled Delta-Sigma Data Converters: Theory, Design and Simulation. IEEE Press, 1992.

    Google Scholar 

  14. J. Dunlop, D. Girma and J. Irvine, “Digital mobile communications and the Tetra system”, Wiley 1999.

    Google Scholar 

  15. T. Rappaport, “Wireless communications, Principles and Practice”, Prentice Hall, 2002, Ch. 11.

    Google Scholar 

  16. L. Liu, “Impacts of I/Q imbalance on QPSK-OFDM-QAM detection,” IEEE Transactions on Consumer Electronics, p. 984–989, August 1998.

    Google Scholar 

  17. Lucien J. Breems, E. Carel Dijkmans, and Johan H. Huijsing, “A quadrature data-dependent DEM Algorithm to improve image rejection of a complex sigma delta modulator”, IEEE Journal of Solid State Circuits, vol 36, p. 1879–1887, Dec, 2001.

    Article  Google Scholar 

  18. J. Glas, “Digital I/Q imbalance compensation in a low-IF receiver,” IEEE Global Telecomm., Conf., Nov. 1998, p. 1461–1466.

    Google Scholar 

  19. K. Pun, J. Franca, C. Azeredo-Leme, “The correction of frequency-dependent I/Q mismatches in quadrature receivers by adaptive signal separation”, [ASIC], 2001, pp. 424–427.

    Google Scholar 

  20. L. Yu, W. Snelgrove, “A Novel Adaptive Mismatch Cancellation System for Quadrature IF Radio Receivers”, IEEE Trans. Circuits Syst. II, pp. 789–801, June 1999.

    Google Scholar 

  21. M. Hajirostam, K. Martin, “On-chip image rejection in a low-IF CMOS receiver”, IEEE international solid state circuit conference [ISSCC], 2006, pp. 457–458.

    Google Scholar 

  22. M. Elmala, S. Embabi, “Calibration of Phase and Gain Mismatches in Weaver Image-Reject Receiver”, IEEE Journal of Solid State Circuits, p. 283–289, February 2004.

    Google Scholar 

  23. L. Der, B. Razavi, “A 2-GHz CMOS image-reject receiver with LMS calibration,” IEEE Journal of Solid State Circuits, p. 167–175, Feb., 2003.

    Google Scholar 

  24. Elahi, K. Muhammad, P. Balsara, “I/Q mismatch compensation using adaptive decorrelation in a low-IF receiver in 90-nm CMOS process” IEEE Journal of Solid State Circuits, p. 395–404, Feb., 2006.

    Google Scholar 

  25. S. Lertavessin, B. Song, “A complex image rejection circuit with sign detection only”, IEEE international solid state circuit conference [ISSCC], 2006, pp. 454–456.

    Google Scholar 

  26. Y. Lai, N. Lam, B. Leung, “A 10MHz IF Digitizer Using a Novel Quadrant Based Swapping Scheme for I,Q Mismatch Elimination That Achieves an Equivalent 65dB Image Rejection Ratio”, European Solid-State Circuits Conference, paper 32.5, p.591–594, September 2002.

    Google Scholar 

  27. N. Lam, B. Leung, “Dynamic Quadrant Swapping Scheme Implemented in a Post conversion Block for I,Q Mismatch Reduction in a DQPSK receiver”, IEEE Journal of Solid State Circuits, Vol. 45, pp. 322–337, February, 2010.

    Article  Google Scholar 

  28. Grilo, E. MacRobbie, R. Halim and G. Temes, "A 1.8 V 94 dB Dynamic Range Sigma Delta Modulator for Voice Applications", 1996 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, 1996, pp. 230–231, 451.

    Google Scholar 

  29. S. Au and B. Leung, "A 1.95 V, 0.34 mW 12-Bit Sigma-Delta Modulator Stabilized by Local Feedback Loops," Proceedings of the IEEE 1996 Custom Integrated Circuits Conference, 1996, pp. 411–414.

    Google Scholar 

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Correspondence to Bosco Leung .

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Leung, B. (2011). Analog-to-Digital Converters. In: VLSI for Wireless Communication. Springer, Boston, MA. https://doi.org/10.1007/978-1-4614-0986-1_6

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  • DOI: https://doi.org/10.1007/978-1-4614-0986-1_6

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