Advanced OOP and Testbench Guidelines

  • Chris Spear
  • Greg Tumbush
Chapter

Abstract

How would you create a complex class for a bus transaction that also performs error injection and has random delays? The first approach is to put everything in a large, flat class. This approach is simple to build, easy to understand (all the code is right there in one class) but can be slow to develop and debug. Additionally, such a large class is a maintenance burden, as anyone who wants to make a new transaction behavior has to edit the same file. Just as you would never create a complex RTL design using just one Verilog module, you should break classes down into smaller, reusable blocks.

Keywords

Val1 Encapsulation Prefix Editing Payback 

Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  • Chris Spear
    • 1
  • Greg Tumbush
    • 2
  1. 1.Synopsys, Inc.MarlboroughUSA
  2. 2.University of Colorado, Colorado SpringsColorado SpringsUSA

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