Abstract
There are several steps needed to verify a design: generate stimulus, capture responses, determine correctness, and measure progress. However, first you need the proper testbench, connected to the design, as shown in Fig. 4.1.
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© 2012 Springer Science+Business Media, LLC
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Spear, C., Tumbush, G. (2012). Connecting the Testbench and Design. In: SystemVerilog for Verification. Springer, Boston, MA. https://doi.org/10.1007/978-1-4614-0715-7_4
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DOI: https://doi.org/10.1007/978-1-4614-0715-7_4
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