Squaring Circuits

  • Cosmin Radu Popa


The squaring circuits are very important blocks in analog signal processing, representing the core for implementing any continuous function, using the limited Taylor series expansion. The squaring function can be relatively easily obtained considering the squaring characteristic of the MOS transistor biased in saturation region. Referring to the input variable, the squaring circuits can be clustered in two important classes: voltage squarers and current squarers, for both of them, the output variable being, usually, a current. The first part of the chapter is dedicated to the analysis of the mathematical relations that represent the functional core of the designed circuits, while, in the second part of the chapter, starting from these elementary principles, there are analyzed and designed concrete squaring circuits, grouped following these mathematical principles.


  1. 1.
    Sato H, Hyogo A, Sekine K (2002) A Vt-zero equivalent MOSFET and its applications. In: IEEE international symposium on circuits and systems V-497–V-500, Arizona, USAGoogle Scholar
  2. 2.
    Filanovsky IM, Baltes H (1992) CMOS two-quadrant multiplier using transistor triode regime. IEEE J Solid-State Circuits 27:831–833CrossRefGoogle Scholar
  3. 3.
    Popa C (2009) High accuracy CMOS multifunctional structure for analog signal processing. In: International semiconductor conference, pp 427–430, Sinaia, RomaniaGoogle Scholar
  4. 4.
    De La Cruz Blas CA, Feely O (2008) Limit cycle behavior in a class-AB second-order square root domain filter. In: IEEE international conference on electronics, circuits and systems, St. Julien’s, pp 117–120, MaltaGoogle Scholar
  5. 5.
    Zarabadi SR, Ismail M, Chung-Chih H (1998) High performance analog VLSI computational circuits. IEEE J Solid-State Circuits 33:644–649CrossRefGoogle Scholar
  6. 6.
    Zele RH, Allstot DJ, Fiez TS (1991) Fully-differential CMOS current-mode circuits and applications. In: IEEE international symposium on circuits and systems, Westin Stamford, pp 1817–1820, Raffles City, SingaporeGoogle Scholar
  7. 7.
    Demosthenous A, Panovic M (2005) Low-voltage MOS linear transconductor/squarer and four-quadrant multiplier for analog VLSI. IEEE Trans Circuits Syst I, Reg Pap 52:1721–1731CrossRefGoogle Scholar
  8. 8.
    Lee BW, Sheu BJ (1990) A high slew-rate CMOS amplifier for analog signal processing. IEEE J Solid-State Circuits 25:885–889CrossRefGoogle Scholar
  9. 9.
    Kumar JV, Rao KR (2002) A low-voltage low power square-root domain filter. In: Asia-Pacific conference on circuits and systems, pp 375–378, Bali, IndonesiaGoogle Scholar
  10. 10.
    Klumperink E, van der Zwan E, Seevinck E (1989) CMOS variable transconductance circuit with constant bandwidth. Electron Lett 25:675–676CrossRefGoogle Scholar
  11. 11.
    El Mourabit A, Sbaa MH, Alaoui-Ismaili Z, Lahjomri F (2007) A CMOS transconductor with high linear range. In: IEEE international conference on electronics, circuits and systems, pp 1131–1134, Marrakech, MoroccoGoogle Scholar
  12. 12.
    Popa C (2006) Improved linearity active resistor using equivalent FGMOS devices. In: International conference on microelectronics, 396–399, Nis, Serbia and MontenegroGoogle Scholar
  13. 13.
    Popa C (2006) Improved linearity active resistor with increased frequency response for VLSI applications. IEEE international conference on automation, quality and testing, robotics, Cluj-Napoca, pp 114–116, RomaniaGoogle Scholar
  14. 14.
    Vlassis S, Siskos S (2001) Differential-voltage attenuator based on floating-gate MOS transistors and its applications. IEEE Trans Circuits Syst I, Fundam Theory Appl 48:1372–1378CrossRefGoogle Scholar
  15. 15.
    Shen-Iuan L, Cheng-Chieh C (1996) A CMOS square-law vector summation circuit. IEEE Trans Circuits Syst II, Analog Digit Signal Process 43:520–523CrossRefGoogle Scholar
  16. 16.
    Giustolisi G, Palmisano G, Palumbo G (1997) 1.5 V power supply CMOS voltage squarer. Electron Lett 33:1134–1136CrossRefGoogle Scholar
  17. 17.
    Kimura K (1994) Analysis of “An MOS four-quadrant analog multiplier using simple two-input squaring circuits with source followers”. IEEE Trans Circuits Syst I, Fundam Theory Appl 41:72–75CrossRefGoogle Scholar
  18. 18.
    El Mourabit A, Lu GN, Pittet P (2005) Wide-linear-range subthreshold OTA for low-power, low-voltage and low-frequency applications. IEEE Trans Circuits Syst I, Reg Pap 52:1481–1488CrossRefGoogle Scholar
  19. 19.
    Popa C (2010) Improved linearity CMOS active resistor based on complementary computational circuits. In: IEEE international conference on electronics, circuits, and systems, Athens, 455–458, GreeceGoogle Scholar
  20. 20.
    Popa C (2004) A new FGMOS active resistor with improved linearity and frequency response. In: International semiconductor conference, 2:295–298, Sinaia, RomaniaGoogle Scholar
  21. 21.
    Manolescu AM, Popa C (2009) Low-voltage low-power improved linearity CMOS active resistor circuits. Springer J Analog Integr Circuits Signal Process 62:373–387CrossRefGoogle Scholar
  22. 22.
    Popa C (2008) Programmable CMOS active resistor using computational circuits. In: International semiconductor conference, Sinaia, pp 389–392, RomaniaGoogle Scholar
  23. 23.
    Jong-Kug S, Charlot JJ (1999) Design and applications of precise analog computational circuits. Midwest Symposium on Circuits and Systems, Las Cruces, pp 275–278Google Scholar
  24. 24.
    Xiang-Luan Jia WH, Shi-Cai Q (1995) A new CMOS analog multiplier with improved input linearity. In: IEEE region 10 international conference on microelectronics and VLSI, pp 135–136, Hong KongGoogle Scholar
  25. 25.
    Jong-Kug S, Charlot JJ (2000) A CMOS inverse trigonometric function circuit. In: IEEE midwest symposium on circuits and systems, pp 474–477, Michigan, USAGoogle Scholar
  26. 26.
    Popa C (2004) A digital-selected current-mode function generator for analog signal processing applications. In: International semiconductor conference, 2: 495–498, Sinaia, RomaniaGoogle Scholar
  27. 27.
    Quoc-Hoang D, Hoang-Nam D, Trung-Kien N, Sang-Gug L (2004) All CMOS current-mode exponential function generator. In: International conference on advanced communication technology, Korea, pp 528–531Google Scholar
  28. 28.
    Landolt O, Vittoz E, Heim P (1992) CMOS selfbiased Euclidean distance computing circuit with high dynamic range. Electron Lett 28:352–354CrossRefGoogle Scholar
  29. 29.
    Cheng-Chieh C, Shen-Iuan L (2000) Current-mode full-wave rectifier and vector summation circuit. Electron Lett 36:1599–1600CrossRefGoogle Scholar
  30. 30.
    Singh S, Radhakrishna Rao K (2006) Low voltage analogue multiplier. In: IEEE Asia pacific conference on circuits and systems, pp 1772–1775, SingaporeGoogle Scholar
  31. 31.
    Boonchu B, Surakampontom W (2003) A CMOS current-mode squarer/rectifier circuit. In: International symposium on circuits and systems, pp I-405–I-408, Bangkok, ThailandGoogle Scholar
  32. 32.
    De La Blas CA, Lopez A (2008) A novel two quadrant MOS translinear squarer-divider cell. In: IEEE international conference on electronics, circuits and systems, St. Julien’s, pp 5–8, MaltaGoogle Scholar
  33. 33.
    Naderi A, Khoei A, Hadidi K (2007) High speed, low power four-quadrant CMOS current-mode multiplier. In: IEEE international conference on electronics, circuits and systems, Marrakech, pp 1308–1311, MoroccoGoogle Scholar
  34. 34.
    Chuen-Yau C, Ju-Ying T, Bin-Da L(1998) Current-mode circuit to realize fuzzy classifier with maximum membership value decision. In: IEEE international symposium on circuits and systems, Monterey, 3:243–246, USAGoogle Scholar
  35. 35.
    Naderi A et al (2009) Four-quadrant CMOS analog multiplier based on new current squarer circuit with high-speed. In: IEEE international conference on “computer as a tool”, St.-Petersburg, pp 282–287, RussiaGoogle Scholar
  36. 36.
    Popa C (2009) A new CMOS current-mode classifier circuit for statistics applications. In: International conference on neural networks, pp 17–20, Prague, Czech RepublicGoogle Scholar
  37. 37.
    Popa C (2006) CMOS quadratic circuits with applications in VLSI designs. In: International conference on signals and electronic systems, pp 627–630, Lodz, PolandGoogle Scholar
  38. 38.
    Popa C (2008) Low-power high precision integrated nanostructure with superior-order curvature-corrected logarithmic core. In: International conference on IC design and technology, pp xii–xvii, Grenoble, FranceGoogle Scholar
  39. 39.
    Popa C (2009) Logarithmical curvature-corrected voltage reference with improved temperature behavior. J Circuits, Syst Comput 18:519–534CrossRefGoogle Scholar
  40. 40.
    Popa C (2009) Logarithmic compensated voltage reference. In: Spanish conference on electron devices, Santiago de Compostela, pp 215–218, SpainGoogle Scholar
  41. 41.
    Popa C (2007) Improved accuracy function generator circuit for analog signal processing. In: International conference on “computer as a tool”, Warsaw, pp 231–236, PolandGoogle Scholar
  42. 42.
    Sawigun C, Serdijn WA (2009) Ultra-low-power, class-AB, CMOS four-quadrant current multiplier. Electron Lett 45:483–484CrossRefGoogle Scholar
  43. 43.
    Popa C (2004) FGMOST-based temperature-independent Euclidean distance circuit. In: International conference on optimization of electric and electronic equipment, pp 29–32, Brasov, RomaniaGoogle Scholar
  44. 44.
    Kumngern M, Chanwutitum J, Dejhan K (2008) Simple CMOS current-mode exponential function generator circuit. In: International conference on electrical engineering/electronics, computer, telecommunications and information technology, Krabi, pp 709–712, ThailandGoogle Scholar
  45. 45.
    Kircay A, Keserlioglu MS, Cam U (2009) A new current-mode square-root-domain notch filter. In: european conference on circuit theory and design, Antalya, pp 229–232, TurkeyGoogle Scholar
  46. 46.
    De La Cruz-Blas CA, Lopez-Martin AJ, Carlosena A (2005) 1.5-V square-root domain second-order filter with on-chip tuning. IEEE Trans Circuits Syst I, Reg Pap 52:1996–2006CrossRefGoogle Scholar
  47. 47.
    Vlassis S, Fikos G, Siskos S (2001) A floating gate CMOS Euclidean distance calculator and its application to hand-written digit recognition. In: International conference on image processing, pp 350–353, Thessaloniki, GreeceGoogle Scholar
  48. 48.
    Popa C (2005) CMOS logarithmic curvature-corrected voltage reference using a multiple differential structure. In: International symposium on signals, circuits and systems, pp 413–416, Iasi, RomaniaGoogle Scholar
  49. 49.
    Popa C (2003) DTMOST low-voltage low-power voltage references with superior-order curvature-corrections. In: European conference on circuits theory and design, pp 38–41, Krakow, PolandGoogle Scholar
  50. 50.
    Hidayat R, Dejhan K, Moungnoul P, Miyanaga Y (2008) OTA-based high frequency CMOS multiplier and squaring circuit. In: International symposium on intelligent signal processing and communications systems, pp 1–4, Bangkok, ThailandGoogle Scholar
  51. 51.
    Machowski W, Kuta S, Jasielski J, Kolodziejski W (2010) Quarter-square analog four-quadrant multiplier based on CMOS invertes and using low voltage high speed control circuits. In: International conference on mixed design of integrated circuits and systems, Warsaw, pp 333–336, PolandGoogle Scholar
  52. 52.
    Raikos G, Vlassis S (2009) Low-voltage CMOS voltage squarer. In: IEEE international on electronics, circuits, and systems, pp 159–162, Medina, TunisiaGoogle Scholar
  53. 53.
    Muralidharan R, Chip-Hong C (2009) Fixed and variable multi-modulus squarer architectures for triple moduli base of RNS. In: IEEE international conference on circuits and systems, Taipei, pp 441–444, TaiwanGoogle Scholar
  54. 54.
    Garofalo V et al (2010) A novel truncated squarer with linear compensation function. In: IEEE international symposium on circuits and systems, Paris, pp 4157–4160, FranceGoogle Scholar
  55. 55.
    Kumbun J, Lawanwisut S, Siripruchyanun M (2009) A temperature-insensitive simple current-mode squarer employing only multiple-output CCTAs. In: IEEE region 10 conference, Singapore, pp 1–4Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  1. 1.Faculty of Electronics, Telecommunications and Information TechnologyUniversity Politehnica of BucharestBucharestRomania

Personalised recommendations