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Voltage and Current Multiplier Circuits

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Synthesis of Computational Structures for Analog Signal Processing

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Abstract

Multiplier circuits represent important building blocks in VLSI designs, finding multiple applications in telecommunication circuits, medical equipments, hearing devices or disk drives. In bipolar technology, the multiplying function could be easily obtained from the logarithmical characteristic of the bipolar transistor, the circuits presenting important errors caused by the nonzero values of the base currents, and also by the temperature dependence of the bipolar transistor parameters. For obtaining a good circuit frequency response, the multiplying function can be achieved in CMOS technology by employing the square-law model of MOS transistor biased in saturation region. In order to respond to the low-power requirements of the newest CMOS designs, the subthreshold operation of the MOS transistor represents an interesting choice. Based on the logarithmical law of a MOS transistor in weak inversion, the complexity of CMOS multiplier circuits can be strongly reduced. Because it exists a relative limited number of mathematical principles that are used for implementing the multiplier circuits, the first part of the chapter is dedicated to the analysis of the mathematical relations that represent the functional core of the designed circuits. In the second part of the chapter, starting from these elementary principles, there are analyzed and designed concrete multiplier circuits, grouped following the mathematical principle they are based on.

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  1. Faculty of Electronics, Telecommunications and Information Technology, University Politehnica of Bucharest, Bucharest, Romania

    Cosmin Radu Popa

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  1. Cosmin Radu Popa
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Correspondence to Cosmin Radu Popa .

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Popa, C.R. (2012). Voltage and Current Multiplier Circuits. In: Synthesis of Computational Structures for Analog Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-0403-3_2

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  • DOI: https://doi.org/10.1007/978-1-4614-0403-3_2

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