Introduction

Abstract

Advances in VLSI technology combined with increase market demands to develop efficient portable devices have increased the interest in designing circuits that are capable to operate at low-voltage and/or low-power consumption. The design of analog and mixed-signal integrated circuits that can operate in a low-voltage environment with high performance is now imperative. This mainly stems from the continuous shrinking of device sizes, which leads to lower breakdown voltages and thus, in fact, circuits cannot operate with high voltages. Another reason is that modern applications require handheld devices with as small as possible dimensions and increased longevity, like the implantable pacemakers for the detection of cardiac signals and radio devices for short-range wireless communications. Also, co-integration of analog and digital circuits on the same chip, as required in modern mixed-signal system-on-chips (SoCs), implies that analog circuits must operate from supply voltages as low as digital ones. The International Technology Roadmap for Semiconductors (ITRS) [1] gives us a unique opportunity to look into the projected future of semiconductor technology and identify the design challenges. According to ITRS, by about the year 2013 and at the 32 nm technology node, the power supply for digital circuits will be at 0.5 V. Since the power consumption in digital circuits is proportional to the square of supply voltage, the continuous voltage scaling results in the reduction of overall power consumption. Of course, it should be noted that the reduction of supply voltage is mainly determined by the reliability of circuits, breakdown voltages and thermal problems; thus, they have to be appropriately scaled down.