Part of the SpringerBriefs in Electrical and Computer Engineering book series (BRIEFSELECTRIC)


Advances in VLSI technology combined with increase market demands to develop efficient portable devices have increased the interest in designing circuits that are capable to operate at low-voltage and/or low-power consumption. The design of analog and mixed-signal integrated circuits that can operate in a low-voltage environment with high performance is now imperative. This mainly stems from the continuous shrinking of device sizes, which leads to lower breakdown voltages and thus, in fact, circuits cannot operate with high voltages. Another reason is that modern applications require handheld devices with as small as possible dimensions and increased longevity, like the implantable pacemakers for the detection of cardiac signals and radio devices for short-range wireless communications. Also, co-integration of analog and digital circuits on the same chip, as required in modern mixed-signal system-on-chips (SoCs), implies that analog circuits must operate from supply voltages as low as digital ones. The International Technology Roadmap for Semiconductors (ITRS) [1] gives us a unique opportunity to look into the projected future of semiconductor technology and identify the design challenges. According to ITRS, by about the year 2013 and at the 32 nm technology node, the power supply for digital circuits will be at 0.5 V. Since the power consumption in digital circuits is proportional to the square of supply voltage, the continuous voltage scaling results in the reduction of overall power consumption. Of course, it should be noted that the reduction of supply voltage is mainly determined by the reliability of circuits, breakdown voltages and thermal problems; thus, they have to be appropriately scaled down.


Supply Voltage Analog Circuit Current Mirror Cascode Transistor Flip Voltage Follower 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    “The International Technology Roadmap for Semiconductors (2009 edition)”, ITRS, 2009
  2. 2.
    E. Vittoz, “Future of analog in the VLSI environment”, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1372–1375, May 1990.Google Scholar
  3. 3.
    K. Bult, “Analog design in deep sub-micron CMOS”, in Proc. European Solid-State Circuits Conference (ESSCIRC), pp.11–17, Sept. 2000.Google Scholar
  4. 4.
    Q. Huang, “Low voltage and low power aspects of data converter design”, in Proc. European Solid-State Circuits Conference (ESSCIRC), pp. 29–35, Sept. 2004.Google Scholar
  5. 5.
    C. Toumazou, F. Lidgey, and D.G. Haigh, “Analog IC design: The current-node approach”, Peter Peregrenus Ltd., London, UK, 1990.Google Scholar
  6. 6.
    F. Yuan, and B. Sun, “A comparative study of low-voltage CMOS current-mode circuits for optical communications”, in Proc. Midwest Symposium on Circuits and Systems (MWSCAS), vol. 1, pp. 315–319, Aug. 2002.Google Scholar
  7. 7.
    F. Ledesma, R. Garcia, and J. Ramirez-Angulo, “Comparison of new and conventional low-voltage current mirrors”, in Proc. Midwest Symposium on Circuits and Systems (MWSCAS), vol. 2, pp. 49–52, Aug. 2002.Google Scholar
  8. 8.
    J. Ramirez-Angulo, R.G. Carvajal, and A. Torralba, “Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements”, IEEE Transactions on Circuits and Systems II, vol. 51, no. 3, pp. 124–129, Mar. 2004.CrossRefGoogle Scholar
  9. 9.
    E. Sackinger, and W. Guggenbuhl, “A high-swing high-impedance MOS cascode circuit”, IEEE Journal of Solid-State Circuits, vol. 25, no. l, pp. 289–298, Feb. 1990.CrossRefGoogle Scholar
  10. 10.
    R.G. Carvajal, J. Ramirez-Angulo, A. Torralba, J.A.G. Galan, A. Carlosena and F.M. Chavero, “The Flipped Voltage Follower: A useful Cell for Low-Voltage Low-Power Circuit Design”, IEEE Transactions on Circuits and Systems I, vol. 52, no. 7, pp. 1276–1291, Jul. 2005.CrossRefGoogle Scholar
  11. 11.
    C. Laoudias, C. Psychalinos, “Low-Voltage CMOS Current-Mode Filters Using Current Mirrors: Two Alternative Approaches”, in Proc. of 14th IEEE Mediterranean Electrotechnical Conference (MELECON), Ajaccio (France), May 2008, pp. 435–440.Google Scholar
  12. 12.
    J. Ramirez-Angulo, M. Robinson, and E. Sanchez-Sinencio, “Current-mode continuous-time filters: two design approaches”, IEEE Transactions on Circuits and Systems II, vol. 39, no. 6, pp. 337–341, Jun. 1992.CrossRefGoogle Scholar
  13. 13.
    S.S. Lee, R.H. Zele, D.J. Allstot, and G. Liang, “CMOS Continuous-Time current-mode filters for high frequency applications”, IEEE Journal of Solid-State Circuits, vol. 28, no. 3, pp. 323–329, Mar.1993.CrossRefGoogle Scholar
  14. 14.
    A.H.M. Shousha, “Implementations of continuous-time current-mode ladder filters using multiple output current integrators”, International Journal of Electronics, vol. 85, no. 4, pp. 497–509, 1998.CrossRefGoogle Scholar
  15. 15.
    G. Souliotis, A. Chrisanthopoulos, and I. Haritantis, “Current Differential Mirrors: New circuits and applications”, International Journal of Circuit Theory Applications, vol. 29, no. 6, pp. 553–574, Nov./Dec. 2001.MATHCrossRefGoogle Scholar
  16. 16.
    G. Souliotis, and C. Psychalinos, “Harmonic oscillators realized using current amplifiers and grounded capacitors”, International Journal of Circuit Theory and Applications, vol. 35, no. 2, pp. 165–173, Mar. 2007.CrossRefGoogle Scholar
  17. 17.
    G. Souliotis, and I. Haritantis, “Current-mode filters based on current mirror arrays”, International Journal of Circuit Theory and Applications, vol. 36, no. 2, pp. 173–183, Mar. 2008.CrossRefGoogle Scholar

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© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  1. 1.University of PatrasRio PatrasGreece

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