Abstract
Chapter 4 presents the final AGC circuits achieved as a result of the study and the blocks implementation carried in previous chapters. In total three novel AGC circuits are proposed.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsReferences
O. Jeon, R.M. Fox and B.A. Myers; “Analog AGC Circuitry for a CMOS WLAN Receiver”; Solid-State Circuits, IEEE Journal of; Vol. 41, Issue 10, pp. 2291 – 2300, Oct. 2006.
T. Oshima, K. Maio, W. Hioe, Y. Shibahara and T. Doi; “Automatic Tuning of RC Filters and Fast Automatic Gain Control for CMOS Low-IF Transceiver”; Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003; pp. 5 – 8, Sept. 2003.
C.-W. Lin, Y.-Z. Liu and K. Y. J. Hsu; “A Low-Distortion and Fast-Settling Automatic Gain Control in CMOS Technology”; Circuits and Systems, 2004. ISCAS ’04. Proceedings of the 2004 International Symposium on; Vol. 1, pp. 541 – 544, May 2004.
Chun-Pang Wu and Hen-Wai Tsao; “A 110-MHz 84-dB CMOS Programmable Gain Amplifier With Integrated RSSI Function”; Solid-State Circuits, IEEE Journal of; Vol. 40, Issue 6, pp. 1249 – 1258, Jun. 2005.
B. Calvo, S. Celma and M.T. Sanz; “Low-Voltage Low-Power CMOS IF Programmable Gain Amplifier”; Circuits and Systems, 2006. MWSCAS ’06. 49th IEEE International Midwest Symposium on; Vol. 2, pp. 276 – 280, Aug. 2006.
S.-B. Park, J.E. Wilson, and M. Ismail; “Peak Detectors for Multistandard Wireless Receivers”; Circuits and Devices Magazine, IEEE; Vol. 22, Issue 6, pp. 6 – 9, Nov.-Dec. 2006.
“Wireless Lan Medium Access Control (MAC) and Physical Layer (PHY) Specifications: High-Speed Physical Layer in the 5-GHz Band”; IEEE Std. 802.11a, Part11, Sep. 1999.
J.M. Khoury, “On the design of constant settling time AGC circuits”; Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on; Vol. 45, Issue 3, pp. 283 – 294, Mar. 1998.
M. Zargari, D.K. Su, C.P. Yue, S. Rabii, D.Weber, B.J. Kaczynski, S.S. Mehta, K. Singh, S. Mendis, and B.A. Wooley; “A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN system”; Solid-State Circuits, IEEE Journal of; Vol. 37, Issue 12, pp. 1688 – 1694, Dec. 2002.
A. Otin, S. Celma and C. Aldea; “A 40-200MHz Programmable 4th-Order Gm-C Filter with Auto-Tuning System”; Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European; pp. 214 – 217, Sep. 2007.
S.I. Liu and Y.S. Hwang; “CMOS Four-Quadrant Multiplier Using Bias Feedback Techniques”; Solid-State Circuits, IEEE Journal of; Vol. 29, Issue 6, Jun. 1994.
J.P. Alegre, S. Celma, B. Calvo and J.M. García del Pozo; “Design of a Novel Envelope Detector for Fast-Settling Circuits”; Instrumentation and Measurement, IEEE Transactions on; Vol. 57, Issue 1, pp. 4 – 9, Jan. 2008.
B. Gilbert; “Limiting-Logarithmic Amplifiers”; Electronics Laboratories Advanced Engineering Course on RF IC Design for Wireless Communication Systems, Lausanne, Switzerland, Jul. 1995.
J. Israelsohn; “Gain control”; EDN; pp. 38 – 46, Aug. 2002.
M. Fujii, N. Kawaguchi, M. Nakamura, T. Ohsawa; “Feedforward and feedback AGC for fast fading channels”; Electronics Letters; Vol. 31, Issue 13, pp. 1029 – 1030, Jun. 1995.
Wang Wenzhao, Chen Yaqin, Zhou Qi; “Implementation of mixed feedback/feedforward analog and digital AGC”; Microwave and Millimeter Wave Technology, 2004. ICMMT 4th International Conference on, Proceedings; pp. 377 – 381, Aug. 2004.
R.G. Carvajal, J. Ramírez-Angulo, A.J. Lopez-Martin, A. Torralba, J.A.G. Galan, A. Carlosena and F.M. Chavero; “The Flipped Voltage Follower: a Useful Cell for Low-voltage Low-power Circuit Design”; Circuits and Systems I: Regular Papers, IEEE Transactions on; Vol. 52, no. 7, pp. 1276 – 1291, 2005.
C.J.B. Fayomi, G.W. Roberts, M. Sawan; “Low power/low voltage high speed CMOS differential track and latch comparator with rail-to-rail input”; Circuits and Systems, 2000. Proceedings. ISCAS 2000; Vol. 5, pp. 653 – 656, May 2000.
J. Segura, J.L. Rossello, J. Morra, H. Sigg; “A variable threshold voltage inverter for CMOS programmable logic circuits”; Solid-State Circuits, IEEE Journal of; Vol. 33, Issue: 8, pp. 1262 – 1265, Aug. 1998.
T. Drenski, L. Desclos, M. Madihian, H. Yoshida H. Suzuki, T. Yamazaki; “A BiCMOS 300ns Attack-Time AGC Amplifier with Peak-Detect and Hold Feature for High-speed Wireless ATM Systems”; Solid-State Circuits Conference, Digest of Technical Papers. ISSCC. IEEE International; pp. 166 – 167, Feb. 1999.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2011 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Pérez, J., Pueyo, S., López, B. (2011). AGC Systems. In: Automatic Gain Control. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-0167-4_4
Download citation
DOI: https://doi.org/10.1007/978-1-4614-0167-4_4
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4614-0166-7
Online ISBN: 978-1-4614-0167-4
eBook Packages: EngineeringEngineering (R0)