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Theory of a Stochastic Algorithm for Capacitance Extraction in Integrated Circuits

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Semiconductors

Part of the book series: The IMA Volumes in Mathematics and its Applications ((IMA,volume 58))

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Abstract

We present the theory of a novel stochastic algorithm for high-speed capacitance extraction in complex integrated circuits. The algorithm is most closely related to a statistical procedure for solving Laplace’s equation known as the floating random-walk method. Our analysis begins with surface Green’s functions for Laplace’s equation on a scalable square domain. From them, we obtain integrals for electric potential and electric field at the domain center. An electrodecapacitance integral is next derived. This integral is expanded as an infinite sum, and probability rules that statistically evaluate the sum are deduced. These rules define the algorithm.

Written material in this paper has been excerpted from a larger work in draft form which will be submitted to Solid State Electronics, for future publication.

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References

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© 1994 Springer-Verlag New York, Inc.

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Le Coz, Y.L., Iverson, R.B. (1994). Theory of a Stochastic Algorithm for Capacitance Extraction in Integrated Circuits. In: Coughran, W.M., Cole, J., Llyod, P., White, J.K. (eds) Semiconductors. The IMA Volumes in Mathematics and its Applications, vol 58. Springer, New York, NY. https://doi.org/10.1007/978-1-4613-8407-6_7

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  • DOI: https://doi.org/10.1007/978-1-4613-8407-6_7

  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4613-8409-0

  • Online ISBN: 978-1-4613-8407-6

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