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CRAY-2 Memory Organization and Interprocessor Memory Contention

  • Conference paper
Book cover Linear Algebra, Markov Chains, and Queueing Models

Part of the book series: The IMA Volumes in Mathematics and its Applications ((IMA,volume 48))

Abstract

This paper describes a simulation study of interprocessor memory contention for a shared memory, vector multiprocessor like the CRAY-2. When programs execute together on such a system, each program’s performance, relative to its performance on a single dedicated processor, degrades because of contention among processors for shared memory. From the results of the simulation study, the paper proposes analytic forms for the asymptotic steady state behavior of throughput, time delay, and efficiency as functions of hardware parameters. The results suggest criteria for evaluating hardware designs and an index of quality for comparing different designs.

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Author information

Authors and Affiliations

  1. Software Division, Cray Research, Inc., Eagan, MN, USA

    Robert W. Numrich

Authors
  1. Robert W. Numrich
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Editor information

Editors and Affiliations

  1. Mathematics Department, North Carolina State University, 27695-8205, Raleigh, NC, USA

    Carl D. Meyer

  2. Department of Mathematics and Computer Science, Wake Forest University, 27109, Winston-Salem, NC, USA

    Robert J. Plemmons

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© 1993 Springer-Verlag New York, Inc.

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Numrich, R.W. (1993). CRAY-2 Memory Organization and Interprocessor Memory Contention. In: Meyer, C.D., Plemmons, R.J. (eds) Linear Algebra, Markov Chains, and Queueing Models. The IMA Volumes in Mathematics and its Applications, vol 48. Springer, New York, NY. https://doi.org/10.1007/978-1-4613-8351-2_16

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  • DOI: https://doi.org/10.1007/978-1-4613-8351-2_16

  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4613-8353-6

  • Online ISBN: 978-1-4613-8351-2

  • eBook Packages: Springer Book Archive

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