Abstract
We model the shared buffer ATM switch as a discrete-time queueing system. The arrival process to each port of the ATM switch is assumed to be bursty and it is modelled by an Interrupted Bernoulli Process. The discrete-time queueing system is analyzed approximately. It is first decomposed into subsystems, and then each subsystem is analyzed separately. The results from the subsystems are combined together through an iterative scheme. The analysis of each subsystem involves the construction of the superposition of all the arrival processes to the switch. Comparisons against simulation data showed that the approximate results have a good accuracy.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
A. Baiocchi, N. Melazzi, M. Listanti, A. Roveri, and R. Winkler, Loss performance analysis of an ATM multiplexer loaded with high-speed on-off sources, IEEE J. SAC 9 (1991), 388–393.
P. Boyer, M. R. Lehnert, and P. J. Kuehn, Queueing in an ATM basic switch element, Tech. Report CNET-123–030-CD-CC, CNET, France, 1988.
H. Bruneeland B. Steyaert, Tail distribution of shared buffer queue contents, Tech. report, RUG Internal Research Report, Nr. 4, 900522.
M. Devault, J.-Y. Cochennec, and M. Servel, The ”Prelude” ATD experiment: Assessments and future prospects, IEEE J. SAC 6 (1988), no. 9, 1528–1537.
A. E. Eckberg and T.-C. Hou, Effects of output buffer sharing on buffer requirements in an ATDM packet switch, INFOCOM ’88, pp. 459–466.
H. Heffes, A class of data traffic processes-covariance function characterization and related queueing results, Bell Sys. Tech. J. 59 (1980), 897–929.
H. Heffes and D. M. Lucantoni, A Markov modulated characterization of packetized voice and data traffic and related statistical multiplexer performance, IEEE J. SAC 4 (1986), 856–868.
F.P. Kelly, Reversibility and stochastic netwroks, John Wiley & Sons, Inc., 1979.
D.D. Kouvatsos and N.P. Xenios, MEM for arbitrary queueing networks with multiple general services and repetitive-service blockings, Perform. Eval. 10 (1989), 169–195.
H. Kuwahara, N. Endo, M. Ogino, and T. Kozaki, A shared buffer memory switch for an ATM exchange, Int. Conf. on Communications (Boston, MA), pp. 4.4.1–4.4.5.
H. Lee, K. Kook, C. S. Rim, K. Jun, and S.-K. Lim, A limited shared output buffer switch for ATM, Fourth Int. Conf. on Data Communication Systems and Their Performance (Barcelona), pp. 163–179.
R. Nagarajan, J. F. Kurose, and D. Towsley, Approximation techniques for computing packet loss in finite-buffered voice multiplexers, IEEE J. SAC 9 (1991), 368–377.
I. Norros, J. W. Roberts, A. Simmonian, and J. T. Virtamo, Loss performance analysis of an ATM multiplexer loaded with high-speed on-off sources, IEEE J. SAC 9 (1991), 378–387.
H. G. Perros and R. Onvural, On the superposition of arrival processes for voice and data, Fourth Int. Conf. on Data Communication Systems and Their Performance (Barcelona), pp. 341–357.
G.H. Petit, A. Buchheister, A. Guerrero, and P. Parmentier, Performance evaluation methods applicable to an ATM multi-path self-routing switching network, Teletraffic and datatraffic in a period of change (Jensen and Iversen, eds.), North Holland, 1991, pp. 917–922.
G.H. Petit and E. M. Desmet, Performance evaluation of shared buffer multiserver output queue switches used in ATM, 7th ITC Specialist Seminar (New Jersey), p. paper 7.1.
G. Pujolle and H.G.Perros, Queueing systems for modelling ATM networks, Int’l conf. on the Performance of Distributed Systems and Integrated Comm. Networks (Koyto).
B. Sengupta, A queue with superposition of arrival streams with and application to packet voice technology, Performance ’90 (King, Mitrani, and Pooley, eds.), North Holland, 1990, pp. 53–59.
F.A. Tobagi, Fast packet switch architectures for broadband integrated services networks, Proc. IEEE 78 (1990), 1133–1167.
H. Yamashita, H. G. Perros, and S. Hong, Performance modelling of a shared buffer ATM switch architecture, Teletraffic and datatraffic in a period of change (Jensen and Iversen, eds.), North-Holland, 1991.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1993 Springer-Verlag New York, Inc.
About this paper
Cite this paper
Hong, S., Perros, H.G., Yamashita, H. (1993). Approximate Analysis of a Discrete-Time Queueing Model of the Shared Buffer ATM Switch. In: Meyer, C.D., Plemmons, R.J. (eds) Linear Algebra, Markov Chains, and Queueing Models. The IMA Volumes in Mathematics and its Applications, vol 48. Springer, New York, NY. https://doi.org/10.1007/978-1-4613-8351-2_14
Download citation
DOI: https://doi.org/10.1007/978-1-4613-8351-2_14
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4613-8353-6
Online ISBN: 978-1-4613-8351-2
eBook Packages: Springer Book Archive