Annealing Behaviour of Proton Bombardment Damage in P-Type Silicon

  • Amitabh Jain
  • B. J. Smith
  • J. Stephen


Capacitance-voltage measurements have been made on silicon n+p diodes which have been implanted with protons at 400 keV. The position of the damage is such that the majority carrier profile in this region is obtained. Measurements made after 50°C annealing steps from 50°C to 700°C show four distinct types of defect. These appear in different temperature ranges. One of these defects which occurs in the annealing temperature range 100°C-300°C has been identified as the silicon divacancy. This has been deduced from estimates of the energy of the defect levels and their behaviour at room temperature and at 132°K. The remaining three defects have been compared rath those reported elsewhere but their physical structure is not clearly identified.


Reverse Bias Donor Level Annealing Behavior Annealing Temperature Range Deep Acceptor 
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Copyright information

© Plenum Press, New York 1977

Authors and Affiliations

  • Amitabh Jain
    • 2
  • B. J. Smith
    • 1
  • J. Stephen
    • 1
  1. 1.Electronics and Applied Physics DivisionHarwell, OxfordshireEngland
  2. 2.Physics Dept.Indian Institute of TechnologyNew DelhiIndia

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