As the dimensions of MOS devices are scaled down, the device structures become more complicated. The insulator/semiconductor interfaces are often non-planar, and the impurity profiles of the devices are complicated and may not be expressed accurately in Gaussian form. The increased complexity of the device structure is necessary for optimization of the device performance, such as minimizing the drain-induced barrier-lowering effects, or enhancing the device reliability, e.g., reducing the electric field at the drain of the MOSFET. Therefore, in the development of VLSI MOS technology, it is essential to be able to simulate the electrical characteristics of devices which have complicated structures. The GEMINI program provides this capability.
KeywordsInput File Mobility Model Device Structure Gate Bias Device Simulation
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