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Fabrication Processes

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Digital CMOS Circuit Design

Part of the book series: The Kluwer International Series in Engineering and Computer Science ((SECS,volume 16))

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Abstract

CMOS processes are generally more complex and expensive than nMOS processes because extra steps and extra masks are required in the fabrication process. Although many different processes are available, all the CMOS processes fall into either one of the two following classes:

  • Bulk processes: the substrate is doped silicon. Examples of bulk processes are p-well, n-well, and twin-tub. Newer bulk processes [18,32] can also have bipolar transistors on the same wafer, which has positive effects on driving capability — which is not as high in MOS as in bipolar technology — and when digital/analog applications — such as sense amplifiers in memory design [17] — are considered.

  • Silicon-on-insulator (SOI) processes: the substrate is an insulator, such as sapphire (“silicon-on-sapphire,” SOS) or silicon dioxide (SiO2).

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Authors and Affiliations

  1. Carnegie-Mellon University, Pittsburgh, Pennsylvania, USA

    Marco Annaratone

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  1. Marco Annaratone
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© 1986 Kluwer Academic Publishers

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Annaratone, M. (1986). Fabrication Processes. In: Digital CMOS Circuit Design. The Kluwer International Series in Engineering and Computer Science, vol 16. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-2285-6_3

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  • DOI: https://doi.org/10.1007/978-1-4613-2285-6_3

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4612-9409-2

  • Online ISBN: 978-1-4613-2285-6

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