Abstract
This chapter presents models and algorithms for accurately estimating the total interconnect length for both random and optimized placements. The algorithms developed in the next chapter for accurately estimating interconnect area require a good estimate of the final total interconnect length. The final total interconnect length is determined by the macro/custom cell placement algorithm which was presented in the previous chapter. This placement algorithm was based on the simulated annealing algorithm. A characteristic feature of simulated annealing is long computation times. Hence the possibility of executing the placement algorithm twice, once for ascertaining the final total interconnect length and the second for obtaining the final placement using the interconnect-area estimator, is unreasonable.
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References
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© 1988 Kluwer Academic Publishers, Boston
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Sechen, C. (1988). Average Interconnection Length Estimation. In: VLSI Placement and Global Routing Using Simulated Annealing. The Kluwer International Series in Engineering and Computer Science, vol 54. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1697-8_5
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DOI: https://doi.org/10.1007/978-1-4613-1697-8_5
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-8957-9
Online ISBN: 978-1-4613-1697-8
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