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Part of the book series: The Kluwer International Series in Engineering and Computer Science ((SECS,volume 42))

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Abstract

Floorplan design [MaMH82, Otte82, LaDi85, PrCh85, WoWT86, WoLi86, WoLi87a] is the first stage of VLSI circuit layout. It is the problem of allocating spaces to a given set of circuit modules in the plane to minimize a weighted sum of the following two quantities: (1) the area of the bounding rectangle containing all the modules; and (2) an estimation of the total interconnection wire length (or any suitable proximity measure). A given module can be classified as rigid or flexible. A module is said to be rigid if its shape and dimensions are fixed. Pre-designed library macro-cells are examples of rigid modules. In this chapter, we consider both rectangular and L-shaped rigid modules. (A programmable logic array is an example of an L-shaped module.) A module is said to be flexible if its shape and dimensions are not fixed. Such flexibility represents the designer’s freedom to manipulate the modules’ internal structure at the floorplanning stage of design. We assume all flexible modules are rectangular. For each flexible module, we are given its area and limits of its allowed aspect ratio, where aspect ratio equals height divided by width. Floorplan design is a generalization of the classical placement problem in which all modules are rectangular rigid modules.

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© 1988 Kluwer Academic Publishers

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Wong, D.F., Leong, H.W., Liu, C.L. (1988). Floorplan Design. In: Simulated Annealing for VLSI Design. The Kluwer International Series in Engineering and Computer Science, vol 42. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1677-0_3

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  • DOI: https://doi.org/10.1007/978-1-4613-1677-0_3

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4612-8947-0

  • Online ISBN: 978-1-4613-1677-0

  • eBook Packages: Springer Book Archive

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