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Placement

  • D. F. Wong
  • H. W. Leong
  • C. L. Liu
Chapter
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 42)

Abstract

The general placement problem is the problem of placing a set of circuit modules on a chip such that a certain objective function is minimized. The ultimate goal is to minimize the total chip area occupied by the circuit modules and the interconnection between the modules. To make the placement problem computationally feasible, various objective functions based on parameters such as the area of the bounding rectangle that contains all the modules, the total interconnection wire length, or some other kind of routing area estimation, are commonly used. Placement problems can be classified according to the different types of design methodology. The three types of placement problems are gate-array placement [HaWA73, QuBr79, KiGV83, FrKa86], standard-cell placement [Breu77, DuKe85, SeSa86, SuKe86], and macro/custom-cell placement [PrVa79, Laut80, JeGe83, ShDu85].

Keywords

Cost Function Simulated Annealing Penalty Function Placement Problem Wire Length 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Kluwer Academic Publishers 1988

Authors and Affiliations

  • D. F. Wong
    • 1
  • H. W. Leong
    • 2
  • C. L. Liu
    • 3
  1. 1.University of Texas at AustinUSA
  2. 2.National University of SingaporeSingapore
  3. 3.University of Illinois at Urbana-ChampaignUSA

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