Abstract
Testing for hardware faults is of major importance in ensuring reliable operation of digital circuits [Bre76,Fuj86]. A circuit must normally be tested during several phases of its production, and also while it is being used in the field, to verify that it is working according to specifications. In the last two decades, circuit design and device fabrication processes have advanced rapidly, resulting in very large-scale integrated (VLSI) circuits containing thousands or millions of transistors. The large number of components in VLSI circuits has greatly increased the importance and difficulty of testing such circuits.
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© 1990 Kluwer Academic Publishers
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Bhattacharya, D., Hayes, J.P. (1990). Introduction. In: Hierarchical Modeling for VLSI Circuit Testing. The Kluwer International Series in Engineering and Computer Science, vol 89. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1527-8_1
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DOI: https://doi.org/10.1007/978-1-4613-1527-8_1
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-8819-0
Online ISBN: 978-1-4613-1527-8
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