Abstract
The dynamic CMOS circuit techniques present us with an attractive alternative to static CMOS circuits. It is possible to achieve higher density and speed with these techniques at the expense of a slight increase in the power requirement. In this chapter we will explore the testability of combinational dynamic CMOS circuits.
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Additional Reading
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© 1990 Kluwer Academic Publishers
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Jha, N.K., Kundu, S. (1990). Test Generation for Dynamic CMOS Circuits. In: Testing and Reliable Design of CMOS Circuits. The Kluwer International Series in Engineering and Computer Science, vol 88. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1525-4_3
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DOI: https://doi.org/10.1007/978-1-4613-1525-4_3
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