Abstract
As a first step in algorithmic synthesis, the designer may want to transform or partition the design, either to improve its efficiency or to explore design alternatives. At the Algorithmic Level, the design can be behaviorally partitioned into concurrent processes and pipestages, or can be structurally partitioned across two or more chips or boards. At the Register-Transfer Level, the design can be transformed to allow the control step scheduler and data path allocator to obtain a more efficient implementation. This chapter describes some of the transformations implemented in the Workbench.
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© 1990 Kluwer Academic Publishers
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Thomas, D.E., Lagnese, E.D., Walker, R.A., Nestor, J.A., Rajan, J.V., Blackburn, R.L. (1990). Transformations. In: Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench. The Kluwer International Series in Engineering and Computer Science, vol 85. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1519-3_3
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DOI: https://doi.org/10.1007/978-1-4613-1519-3_3
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-8815-2
Online ISBN: 978-1-4613-1519-3
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