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Design of a Low Power Video Decompression Chip Set for Portable Applications

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Abstract

This paper describes the design process of a chip set which performs real-time video decompression for wireless portable applications and concentrates on four critical aspects of the design: compression algorithm development, control complexity, programmability, and throughput. For each of these design areas, this paper evaluates the design trade-offs between low power, compression efficiency, and throughput, which are the three main requirements for wireless portable video. The chip set consists of a subband reconstruction chip and a pyramid vector quantization (PVQ) decoder chip and requires no external memory support or frame buffer. For portable applications with a resolution of 176 pixels wide, 240 lines, and 30 frames per second color video, the chip set, operating at a 1.35 V supply, dissipates less than 9 mW.

This research was supported by JSEP contract number DAAH04-94-G-0058.

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© 1996 Kluwer Academic Publishers

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Gordon, B.M., Tsern, E., Meng, T.H. (1996). Design of a Low Power Video Decompression Chip Set for Portable Applications. In: Chandrakasan, A.P., Brodersen, R.W. (eds) Technologies for Wireless Computing. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1453-0_4

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  • DOI: https://doi.org/10.1007/978-1-4613-1453-0_4

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4612-8633-2

  • Online ISBN: 978-1-4613-1453-0

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