Abstract
To allow the rapid prototyping of application specific signal processors, an extensive VHDL library of architectural building blocks is needed. In this chapter, we present an object-oriented approach to generating a library of VHDL synthesizable models. The object-oriented analysis and implementation of the VHDL model generation system is described. By using an object-oriented development method, the model generation system has been designed to be easily extended, allowing new components to be added to the component library without changing the system code. An example of the VHDL code generated for a 4-bit ripple carry adder is included
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© 1996 Kluwer Academic Publishers
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Powley, G.S., DeGroat, J.E. (1996). Object-Oriented Generation of VHDL Models. In: Bergé, JM., Levia, O., Rouillard, J. (eds) Object-Oriented Modeling. Current Issues in Electronic Modeling, vol 7. Springer, New York, NY. https://doi.org/10.1007/978-1-4613-1349-6_7
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DOI: https://doi.org/10.1007/978-1-4613-1349-6_7
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4612-8581-6
Online ISBN: 978-1-4613-1349-6
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