Multi-Level Logic Synthesis Using ZBDDs

  • Shin-ichi Minato
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 342)


Logic synthesis and optimization techniques have been used successfully for practical design of VLSI circuits in recent years. Multi-level logic, Optimization is important in logic synthesis systems and a lot of research in this field has been undertaken[MKLC87, MF89, Ish92]. In particular, the algebraic logic minimization method, such as MIS[BSVW87], is the most successful and prevalent way to attain this optimization. It is based on cube set (or two-level logic) minimization and generates multi-level logic from cube sets by applying a weak-division method. This approach is efficient for functions that can be expressed in a feasible size of cube sets, but we are sometimes faced with functions whose cube set representations grow exponentially with the number of inputs. Parity functions and full-adders are examples of such functions. This is a problem of the cube-based logic synthesis methods.


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Copyright information

© Kluwer Academic Publishers 1996

Authors and Affiliations

  • Shin-ichi Minato
    • 1
  1. 1.NTT LSI LaboratoriesKanagawaJapan

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