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Abstract

This paper develops a method for formally proving the correctness of a microprocessor using an equational method. The behavioral and structural specifications of the processor are expressed in a functional language. The asynchronous interaction between the memory and CPU is expressed in the specification by using a nondeterministic function random. This makes our specification more direct and natural than previous efforts based on a functional formalism. The previous efforts have had to encode in the specification the anticipated asynchronous interaction between the memory and the CPU.

The statement of correctness is expressed as a sentence in FOPC with equations relating expressions of the specification language as atomic formulae. The verification is carried out by formulating a set of invariants on the reachable states of the processor. The invariants are verified via symbolic evaluation employing appropriate induction and case analysis. The invariant approach makes the verification method modular in that it isolates the parts of the proof which are microcode-dependent from the rest. The method has been applied to verify an abstract version of the processor architecture used in Wirth’s Modula II machine LILITH.

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© 1989 Springer-Verlag New York Inc.

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Sekar, R.C., Srivas, M.K. (1989). Formal Verification of a Microprocessor Using Equational Techniques. In: Birtwistle, G., Subrahmanyam, P.A. (eds) Current Trends in Hardware Verification and Automated Theorem Proving. Springer, New York, NY. https://doi.org/10.1007/978-1-4612-3658-0_4

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  • DOI: https://doi.org/10.1007/978-1-4612-3658-0_4

  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4612-8195-5

  • Online ISBN: 978-1-4612-3658-0

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