Abstract
This chapter presents a brief and partial historical overview of the combination of technological events leading to a new paradigm in visualization—the development and embracing of Heterogeneous Processor Units (HPUs) along with supporting operating systems and development tools across multiple platforms from handheld mobile devices to supercomputers.
HPUs are the result of the evolution of integration of more functions and functionality in semiconductors due to the regular cadence of manufacturing processes shrinking—often referred to as Moore’s Law.
The HPU is the integration of powerful serial processors like the ×86 architecture or RISC processors like ARM and MIPS, and highly parallel processors known as GPUs—graphics processor units. These HPUs bring new opportunities to the creation of powerful yet low cost visualization systems.
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Notes
- 1.
A fabless semiconductor company specializes in the design and sale of hardware devices and semiconductor chips while outsourcing the fabrication or “fab” of the devices to a specialized manufacturer called a semiconductor foundry.
- 2.
Single instruction, multiple data (SIMD), is a class of parallel computers with elements that perform the same operation on multiple data simultaneously. Thus, such machines exploit data level parallelism.
- 3.
ATI initially called their unit a VPU—Video Processor Unit, but ultimately gave up the name and adopted the more popular GPU designation.
- 4.
GPUs are a special class of ASICs, and both terms are used interchangeably.
- 5.
The Nvidia NV40 also was the first to support Microsoft’s Direct X 9 when it had an enhanced shader model (version 3) added which offered long programs and flow control.
- 6.
A “core” typically now refers to an ALU (arithmetic Logic Unit) capable of at least a fp32 MAD (32-bit floating point Multiply-Add-Divide operation), as distinct from “processors” used in the context above, which is a collection of cores.
- 7.
SAXPY (Single-precision real Alpha X Plus Y[1]) is one of the functions in the Basic Linear Algebra Subprograms (BLAS) package, and is a common operation in computations with vector processors. SAXPY is a combination of scalar multiplication and vector addition.
- 8.
OpenGL is a cross-platform API for writing applications that produce 2D and 3D computer graphics.
- 9.
Mark Harris, PhD., introduced the term “GPGPU” in 2002 (while an employee of Nvidia), and founded the website www.gpgpu.org that same year.
- 10.
VLSI—Very Large Scale Integration—semiconductors with hundreds of thousands of transistors.
- 11.
It was while chatting with a journalist that Mead coined the term Moore’s Law.
- 12.
In computing, FLOPS (or flops or flop/s) is an acronym meaning FLoating point OPerations per Second. The FLOPS is a measure of a computer’s performance, especially in fields of scientific calculations that make heavy use of floating point calculations.
- 13.
The Intel 80286 (also called iAPX 286), introduced on February 1, 1982, was a 16-bit ×86 microprocessor with 134,000 transistors.
- 14.
AMD markets their HPU as an “APU”—accelerate processor unit.
- 15.
International Solid-State Circuits Conference, held annually in San Francisco and sponsored by the Institute of Electrical and Electronic Engineers (IEEE).
- 16.
Transcoding is the conversion of a video file from one compression scheme (e.g., MPEG-2) to another such as H.264 or MPEG-4.
Abbreviations
- HPU :
-
Heterogeneous processor unit;
- GPU :
-
Graphics processor unit;
- OpenCL :
-
a HPU programming language and tool set;
- SIMD:
-
Single instruction, multiple data;
- AIB :
-
Add-in board;
- FLOPS :
-
Floating operations per second;
- SoC :
-
System on a Chip
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Peddie, J. (2012). The New Visualization Engine— The Heterogeneous Processor Unit. In: Dill, J., Earnshaw, R., Kasik, D., Vince, J., Wong, P. (eds) Expanding the Frontiers of Visual Analytics and Visualization. Springer, London. https://doi.org/10.1007/978-1-4471-2804-5_21
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