BiPMOS Fractional-N Frequency Synthesizer For Wideband Wireless Systems
This work is aimed at designing a Phase Locked Loop (PLL) circuit to be used as a frequency synthesizer in a RF transceiver. In modern wireless communication systems the local oscillator phase noise specification sets the allowed strength of nearby channels. In the receiver (Figure 1), the PLL frequency f lo is set to a fixed offset from the desired channel fRF to downconvert it to the intermediate frequency f if .
KeywordsResis Settling Reso Guaran Tenuated
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- B. Miller and B. Conley. A multiple modulator fractional divider. IEEE Transactions On Instrumentation and Meas, 40(3), June 1991.Google Scholar
- V. Friedman. The structure of the limit Cycles in Sigma Delta Modulation. IEEE Transactions On Communications, 36(8), August 1988.Google Scholar
- T.A.D. Riley, M.A. Copeland, T.A. Kwasniewski. Delta-sigma modulation in fractional-N frequency synthesis. IEEE J. Of Solid-State Circuits, 28, May 1993.Google Scholar
- H. Wang. A Geometric View of ΣΔ Modulations. IEEE Trans. On Circuits and Systems-II Analog and Digital Signal Processing, 39(6), June 1992.Google Scholar
- C. Vaucher and D. Kasperkovitz. A Wide-Band Tuning System for Fully Integrated Satellite Receivers. IEEE J. Of Solid-State Circuits, 33(7), July 1998.Google Scholar
- N.H. Sheng, R.L. Pierson, K.C. Wang, R.B. Nubling, P.M. Asbeck, M.C.F. Chang, K.L. Edwards, and D.E. Phillips. A High-Speed Multimodulus HBT Prescaler for Frequency Synthesizer Applications. IEEE J. Of Solid-State Circuits, 26(10), October 1991.Google Scholar
- C. Vaucher et al. A Family of Low-Power Truly Modular Programmable Dividers in Standard 0.35-µm CMOS Technology. IEEE J. Of Solid-State Circuits, 35(7), July 2000.Google Scholar
- T.H. Lee. Oscillator Phase Noise: A Tutorial. IEEE J. Of Solid-State Circuits, 35(3), March 2000.Google Scholar
- M.A. Margarit et al. A Low-Noise, Low-Power VCO with Automatic Amplitude Control for Wireless Applications. IEEE J. Of Solid-State Circuits, 34(6), June 2000.Google Scholar
- J. Craninckx and M.S.J. Stejaert. A 1.8-GHz Low-Phase-Noise CMOS VCO Using Optimizied Hollow Spiral Inductors. IEEE J. Of Solid-State Circuits, 32(5), May 1997.Google Scholar
- M. Zannoth, B. Kolb and J. Fenk. A Fully Integrated VCO at 2 GHz. IEEE J. Of Solid-State Circuits, 33(12), December 1998.Google Scholar