BiPMOS Fractional-N Frequency Synthesizer For Wideband Wireless Systems

  • Tino Copani
Conference paper

Abstract

This work is aimed at designing a Phase Locked Loop (PLL) circuit to be used as a frequency synthesizer in a RF transceiver. In modern wireless communication systems the local oscillator phase noise specification sets the allowed strength of nearby channels. In the receiver (Figure 1), the PLL frequency f lo is set to a fixed offset from the desired channel fRF to downconvert it to the intermediate frequency f if .

Keywords

Resis Settling Reso Guaran Tenuated 

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Copyright information

© Springer-Verlag London Limited 2000

Authors and Affiliations

  • Tino Copani
    • 1
  1. 1.DEES, Engineering FacultyUniversity of CataniaCataniaItaly

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