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Life-Cycle Assessment of CMOS Logic

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Abstract

Determination of the life-cycle environmental and human health impacts of semiconductor logic is essential to a better understanding of the role information technology can play in achieving energy efficiency or global warming potential reduction goals. This chapter provides a life-cycle assessment for digital logic chips over 7 technology generations, spanning from 1995–2013. Environmental indicators include global warming potential, acidification, eutrophication, ground-level ozone (smog) formation, potential human cancer and non-cancer health effects, ecotoxicity and water use. While impacts per device area related to fabrication infrastructure and use-phase electricity and have increased steadily, those due to transportation and fabrication direct emissions have fallen as a result of changes in process technology, device and wafer sizes and yields over the generations. Electricity, particularly in the use phase, and direct emissions from fabrication are the most important contributors to life-cycle impacts. Despite the large quantities of water used in fabrication, water consumption is primarily driven by electricity generated for use-phase power. Reducing power consumption in the use phase is the most effective way to limit impacts, particularly for the more recent generations of logic.

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Correspondence to Sarah B. Boyd .

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Boyd, S.B. (2012). Life-Cycle Assessment of CMOS Logic. In: Life-Cycle Assessment of Semiconductors. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-9988-7_5

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  • DOI: https://doi.org/10.1007/978-1-4419-9988-7_5

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