Abstract
As discussed in the previous chapter, the progress in silicon photonics research has enabled the physical demonstration of all the devices that are necessary to build extremely high-bandwidth density and energy-efficient links for on-chip and off-chip communications. Photonic network design, however, requires a major paradigm shift from traditional network design due to the fundamental differences in how electronics and photonics operate. Consequently, new modeling and analysis methods must be employed to realize a chip-scale photonic interconnection network. This chapter describes a methodology and a supporting computer-aided design (CAD) environment to model the basic photonic devices, to combine them to realize photonic network architectures, and to analyze the physical-layer and system-level performance properties of these networks.
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Bergman, K., Carloni, L.P., Biberman, A., Chan, J., Hendry, G. (2014). Photonic Simulation and Design Space. In: Photonic Network-on-Chip Design. Integrated Circuits and Systems, vol 68. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-9335-9_4
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DOI: https://doi.org/10.1007/978-1-4419-9335-9_4
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