Integrated Multiscale Process Simulation in Microelectronics
We discuss selected applications of integrated multiscale process simulation (IMPS) that are particularly relevant to integrated circuit fabrication. We first summarize approaches to IMPS for two processes for which the governing equations are well accepted. In these cases, models for equipment scale (meter), pattern scale (mm) and feature scale (micron) are solved simultaneously. The first approach uses regular grids, and is applied to low-pressure chemical vapor deposition (LPCVD) of silicon dioxide from tetraethoxysilane (TEOS). The second approach uses unstructured meshes, and is applied to electrochemical deposition (ECD) of copper. The goal is to develop approaches to estimate “loading” in these processes; i.e., the effects of pattern density and topography on local deposition rates. This is accomplished by resolving pattern (mesoscopic, mm) scales, which are between equipment (0.1-1 m) and feature scales (0.1-1 μm). In this work, we focus on steady state simulation results. We close the discussion of deposition processes with a few thoughts on extending IMPS to the grain scale, and the conversion of discrete atomistic representations to continuum representations of islands during deposition. We end by discussing progress made towards IMPS for chemical mechanical planarization (CMP). In this example, well-accepted models or relevant simulators do not exist for any scale of the process.
KeywordsFeature Scale Mesoscale Model Chemical Mechanical Polishing Wafer Surface Reactor Scale
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