Abstract
The scaling of the CMOS channel length to below 0.5 um and increasing of the chip density to the ULSI range have placed power dissipation on an equal footing with the performance as a figure of merit in digital circuit design. Portability and reliability [1] have also played a major role in the emergence of low-power, low-voltage, digital circuit designs. The need to extend the battery life, to have inexpensive packaging and cooling systems, and to reduce the weight and size of the equipment were the driving forces in this regard.
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Elrabaa, M.S., Abu-Khater, I.S., Elmasry, M.I. (1997). Low-Power High-Performance Adders. In: Advanced Low-Power Digital Circuit Techniques. The Springer International Series in Engineering and Computer Science, vol 405. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-8546-0_2
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DOI: https://doi.org/10.1007/978-1-4419-8546-0_2
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