Abstract
This chapter is on memory testing, and our focus is on memory BIST (MBIST) structures. In today’s technology, there is hardly any chip that does not contain some form of a memory. In addition, there is hardly any system that does not contain several dedicated memory chips. In the small scale, memories come as register files as part of digital system, and in the large scale, memories come as chips with memory cells that are reaching 1G cells in the next few years. Furthermore, memories come in many forms of volatile, nonvolatile, static, and dynamic, each of which has its own subcategories and structures. Regardless of the size, type, and hardware structures, memory cannot be tested in the same way as logic testing and it requires its own test methods.
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Navabi, Z. (2011). Memory Testing by Means of Memory BIST. In: Digital System Test and Testable Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-7548-5_11
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DOI: https://doi.org/10.1007/978-1-4419-7548-5_11
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