Probabilistic Error Propagation in a Logic Circuit Using the Boolean Difference Calculus



A gate-level probabilistic error propagation model is presented which takes as input the Boolean function of the gate, input signal probabilities, the error probability at the gate inputs, and the gate error probability and generates the error probability at the output of the gate. The presented model uses the Boolean difference calculus and can be efficiently applied to the problem of calculating the error probability at the primary outputs of a multilevel Boolean circuit with a time complexity which is linear in the number of gates in the circuit. This is done by starting from the primary inputs and moving toward the primary outputs by using a post-order – reverse Depth First Search (DFS ) – traversal. Experimental results demonstrate the accuracy and efficiency of the proposed approach compared to the other known methods for error calculation in VLSI circuits.


Monte Carlo Boolean Function Logic Circuit Soft Error Primary Output 
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Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Nasir Mohyuddin
    • 1
    • 2
  • Ehsan Pakbaznia
    • 2
  • Massoud Pedram
    • 2
  1. 1.Department of Electrical Engineering – SystemsUniversity of Southern CaliforniaLos AngelesUSA
  2. 2.Department of Electrical Engineering – SystemsUniversity of Southern CaliforniaLos AngelesUSA

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