Ultra-thin Wafer Fabrication Through Dicing-by-Thinning

  • Christof Landesberger
  • Sabine Scherbaum
  • Karlheinz Bock


The technological concept ‘dicing-by-thinning’ (DbyT) offers a new technique for die separation for ultra-thin wafers. Conventional sawing is replaced by preparation of frontside trenches and subsequent backside thinning. It will be shown that introducing plasma etched trenches allows for both preparation of ultra-thin dies of high fracture strength and for a significant increase in number of chips per wafer. It is concluded that dicing-by-thinning offers a new strategy for cost effective manufacture of very small and ultra-thin radio frequency identification (RFID) devices. Finally, a short outlook on the development of self-assembly processes for ultra-thin microelectronic components will be given.


Wafer Fabrication Metal Pattern Chip Breakage Radio Frequency Identification Device Carrier Wafer 
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  1. 1.
    Landesberger C, Klink G, Schwinn G, Aschenbrenner R (2001) New dicing and thinning concept improves mechanical reliability of ultra thin silicon. In: International symposium and exhibition on advanced packaging materials, Braselton, 92–97 March 2001Google Scholar
  2. 2.
    Landesberger C, Feil M, Klumpp A. Method of subdividing a wafer. US Patent 6,756,288 B1, European patent EP 1 192 657 B1Google Scholar
  3. 3.
    Landesberger C, Köthe O, Bleier M. Verfahren zum Bearbeiten eines Wafers. German Patent, DE 102 29 499 B4Google Scholar
  4. 4.
    Schönfelder S, Ebert M, Landesberger C, Bock K, Bagdahn J (2007) Investigations of the influence of dicing techniques on the strength properties of thin silicon. Microelectron Reliab 47:168–178CrossRefGoogle Scholar
  5. 5.
    Heinze P, Amberger M, Chabert T (2008) Perfect chips: chip-side-wall stress relief boosts stability. Future Fab Int 25:111–117Google Scholar
  6. 6.
    Takyu S, Sagara J, Kurosawa T (2008) A study on chip thinning for ultra thin memory devices. In: Electronics components and technology conference (ECTC), Lake Buena Vista, 1511–1516.Google Scholar
  7. 7.
    Usami M (2004) An ultra-small RFID chip: μ-chip. In: 2004 IEEE Asia-Pacific conference on advanced system integrated circuits (AP-ASIC2004), 4–5 Aug 2004Google Scholar
  8. 8.
    Feil M, Adler C, Hemmetzberger D, Bock K (2004) The challenge of ultra-thin chip assembly. In: Electronics components and technology conference (ECTC), Las Vegas, NV, USAGoogle Scholar
  9. 9.
    Smith JS. Fluidic self-assembly of active antenna. US Patent 6,611,237 B2Google Scholar
  10. 10.
    Bock K. European Patent application EP 1 499 168 A2Google Scholar
  11. 11.
    Bock K, Scherbaum S, Yacoub-George E, Landesberger C (May 2008) Selective one-step plasma patterning process for fluidic self-assembly of silicon chips. In: Electronic components and technology conference (ECTC), Lake Buena Vista, 1099–1104.Google Scholar
  12. 12.
    Landesberger C, Hell W, Yacoub-George E, Scherbaum S, König M, Feil M, Bock K (June 2009) Assembly of thin and flexible silicon devices on large area foil substrates. In: International conference and exhibition for the organic and printed electronics industry, FrankfurtGoogle Scholar
  13. 13.
    Landesberger C (ed) (2010) Entwicklung eines Selbstmontage-Verfahrens (self-assembly) für die Systemintegration von sehr kleinen Silizium-Bausteinen. Abschlussbericht des BMBF Verbundvorhabens Assemble!, Fortschritt-Berichte VDI. 9(386)Google Scholar

Copyright information

© Springer Science+Business Media, LLC 2011

Authors and Affiliations

  • Christof Landesberger
    • 1
  • Sabine Scherbaum
  • Karlheinz Bock
  1. 1.Fraunhofer Research Institution for Modular Solid State Technologies (EMFT)MunichGermany

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