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Thin Wafer Manufacturing and Handling Using Low Cost Carriers

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Ultra-thin Chip Technology and Applications

Abstract

This chapter focuses on thin wafer fabrication and processing that uses low cost sub carriers. It describes the state of the art and the technical boundaries of the application of foils for wafer support and protection. First, the thinning technology and the applied materials are described in terms of process capability and maturity. Methods of thin wafer characterization are presented. Subsequently, the impact of front end design on ultra-thin wafer manufacturing is highlighted. Finally, processes after wafer thinning that enable the “perfect” die are described.

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References

  1. Wu JD, Huang CY, Liao CC (2003) Fracture strength characterization and analysis of silicon dies. Microelectron Reliab 43:269–277

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  2. Weibull distributions are plotted corresponding to: http://www.weibull.de/WeibullHTML.htm

  3. Heinze PM, Amberger M and Chabert T (2007) Five-side stress relief: the method to get the “perfect die,” advanced packaging conference 10–11 October 2007, SEMICON Europa 2007, Stuttgart, Germany

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Acknowledgements

The findings and progress in the field of ultra-thin Silicon processing presented here are partially based on public funded innovation activities. The authors would like to thank the BMBF (Bundesministerium für Bildung und Forschung) for funding the projects SmartPack and SECUDIS.

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Correspondence to Florian Schmitt .

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© 2011 Springer Science+Business Media, LLC

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Schmitt, F., Zernack, M. (2011). Thin Wafer Manufacturing and Handling Using Low Cost Carriers. In: Burghartz, J. (eds) Ultra-thin Chip Technology and Applications. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7276-7_3

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  • DOI: https://doi.org/10.1007/978-1-4419-7276-7_3

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4419-7275-0

  • Online ISBN: 978-1-4419-7276-7

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