Integrated Circuit Qualification for Space and Ground-Level Applications: Accelerated Tests and Error-Rate Predictions

Abstract

Integrated circuits (analog, digital or mixed) sensitivity evaluation to Single Event Effects (SEE) requires specific methodologies and dedicated tools. Indeed, such evaluation is based on data gathered from on-line tests performed in a suitable facility (cyclotron, linear accelerator, laser , etc.). The target circuit is exposed to particles fluxes having features (energy and range in Silicon) somewhat representative of the ones the circuit will encounter in its final environment. This chapter will describe and illustrate with experimental results, the methodologies and the hardware and software developments required for the evaluation of the sensitivity to SEE of integrated circuits. Those techniques will be applied to a SRAM-based FPGA and to a complex processor. In case of sequential circuits such as processors, the sensitivity to SEE will strongly depend on the executed program. Hardware/software fault-injection experiments, performed either on the circuit or on an available model, are proved as being complementary of radiation ground testing. Indeed, data issued from fault injection combined with data issued from radiation ground testing allow in accurately predicting the error rate of any program.