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Adaptive Voltage Control for Energy-Efficient NoC Links

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Low Power Networks-on-Chip

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Abstract

As we enter the many-core integration era driven by advances in multiprocessor system-on-chip innovations, interconnect emerges as the bottleneck in achieving energy efficiency in systems-on-chip. This chapter surveys the state-of-the-art in energy-efficient communication link design for NoCs. After reviewing techniques at the datalink and physical abstraction layers, we introduce a lookahead-based transition-aware adaptive voltage control method for achieving improved energy-efficiency at moderate cost in performance and reliability. Limitations of this method are evaluated and future prospects in energy-efficient link design are projected.

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Authors and Affiliations

  1. University of Rochester, Rochester, NY, 14627, USA

    Paul Ampadu

Authors
  1. Paul Ampadu
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  2. Bo Fu
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  3. David Wolpert
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  4. Qiaoyan Yu
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Correspondence to Paul Ampadu .

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Editors and Affiliations

  1. Dipto. Elettronica e Informazione (DEI), Politecnico di Milano, Via Ponzio 34/5, Milano, 20133, Italy

    Cristina Silvano

  2. NEC Laboratories America, Inc., Independence Way 4, Princeton, 08540, New Jersey, USA

    Marcello Lajolo

  3. Dipto. Elettronica e Informazione (DEI), Politecnico di Milano, Via Ponzio 34/5, Milano, 20133, Italy

    Gianluca Palermo

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Ampadu, P., Fu, B., Wolpert, D., Yu, Q. (2011). Adaptive Voltage Control for Energy-Efficient NoC Links. In: Silvano, C., Lajolo, M., Palermo, G. (eds) Low Power Networks-on-Chip. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-6911-8_3

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  • DOI: https://doi.org/10.1007/978-1-4419-6911-8_3

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  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-6910-1

  • Online ISBN: 978-1-4419-6911-8

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