Abstract
Over-sampling scheme in addition to the noise shaping property of Δ∑ architectures, makes it very suitable for implementing high resolution data converters. In addition, this architecture exhibit low sensitivity to the non-ideality behavior of analog circuits, such as limited gain of amplifier, device mismatch, and offset of amplifier [1, 2]. This property is specially desirable in design of low-cost and high-performance mixed-signal circuits in modern CMOS technologies.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
S. R. Norsworthy, R. Schreier, G. C. Temes, Delta-Sigma Data Converters: Theory, Design, and Simulation, IEEE, 1997
B. E. Boser and B. A. Wooley, “The design of Sigma-Delta modulation analog-to-digital converters,” IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1298–1308, Dec. 1988
B. Razavi, Principles of Data Conversion System Design, IEEE, 1995
A. Iwata, N. Skimura, M. Nagata, and T. Morie, “An architecure of delta sigma A-to-D converter using a voltage controlled oscillator as a multi-bit quantizer,” in Proceedings of IEEE International Symposium on Circuits and Systems, pp. 445–448, May 1998
R. Naiknaware, H. Tang, and T. Fiez, “Time-referenced single-path multi-bit ΔΣ ADC using VCO-based quantizer,” in IEEE Transactions Circuits Systems-II: Analog Digital Signal Processings, vol. 47, no.6, pp. 596–602, Jun. 2000
M. Z. Staayer and M. H. Perrot, “A 12-Bit, 10-MHz bandwidth, continuous-time ΔΣ ADC with a 5-bit, 950-MS/s VCO-based quantizer,” IEEE J. Solid-State Circuits, vol. 43, no. 4, pp.805–814, Apr. 2008
S. Kuboki, K. Kato, N. Miyakawa, and K. Matsubara, “Nonliearity analysis of resistor string A/D converters,” in IEEE Transactions on Circuits and Systems, vol. 29, no. 6, pp. 383–390, Jun. 1982
J. McNeill, “Jitter in ring oscillators,” IEEE J. Solid-State Circuits, vol. 32, pp. 870879, Jun. 1997
P. Kinget, “Device mismatch and tradeoffs in the design of analog circuits,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1212–1224, Jun. 2005
A. Hajimiri, S. Limotyrakis, and T. H. Lee, “Jitter and phase noise in ring oscillators,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 790-804, Jun. 1999
E. Seevinck, “Companding current-mode integrator: a new circuit principle for continuous-time monolithic filters,” in IEE Electronics Letters, no. 24, vol. 26, pp. 2046–2047, Nov. 1990
O. Shoaei, “Continuous-time Delta-Sigma A/D converters for high speed applications” Ph.D. Dissertation, Carleton University, 1995
O. Bajdechi and J. H. Huijsing, Systematic Design of Sigma-Delta analog-to-digital converters, Kluwer, 2004
J. A. Cherry and W. M. Snelgrove, “Excess loop delay in continuous-time Delta-Sigma modulators,” in IEEE Transactions on Circuits and Systems-II, vol. 46, no. 4, pp. 376–389, Apr. 1999
N. Kotic, “Design of a ring oscillator based delta-sigma modulators,” Master Thesis, Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland, 2010
D. San Martin Molina, “Design of a very low power delta-sigma analog to digital converter,” Master Thesis, Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland, 2009
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2010 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Tajalli, A., Leblebici, Y. (2010). Widely Adjustable Ring Oscillator Based ΣΔ ADC. In: Extreme Low-Power Mixed Signal IC Design. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-6478-6_9
Download citation
DOI: https://doi.org/10.1007/978-1-4419-6478-6_9
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4419-6477-9
Online ISBN: 978-1-4419-6478-6
eBook Packages: EngineeringEngineering (R0)