Abstract
As already discussed in Chap. 3, reduced voltage swing, fast current domain switching speed, and fully differential topology of SCL circuits make them very suitable for high frequency applications. In addition, SCL circuits exhibit very low sensitivity to common-mode noise sources with very low noise injection to substrate or supply lines [1,2]
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Tajalli, A., Leblebici, Y. (2010). Low-Activity-Rate and Memory Circuits in STSCL. In: Extreme Low-Power Mixed Signal IC Design. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-6478-6_6
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