Compilation of Polychronous Data Flow Equations



High-level embedded system design has gained prominence in the face of rising technological complexity, increasing performance requirements and shortening time to market demands for electronic equipments. Today, the installed base of intellectual property (IP) further stresses the requirements for adapting existing components with new services within complex integrated architectures, calling for appropriate mathematical models and methodological approaches to that purpose.


Code Generation Precedence Relation Path Algebra Target Architecture Clock Product 
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Copyright information

© Springer US 2010

Authors and Affiliations

  1. 1.CNRS/IRISARennesFrance
  2. 2.INRIA, Centre de Recherche de RennesRennesFrance

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